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853S9252BKILF Datasheet(PDF) 11 Page - Integrated Device Technology

Part # 853S9252BKILF
Description  2.5V, 3.3V ECL/LVPECL Clock/Data Fanout Buffer
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Manufacturer  IDT [Integrated Device Technology]
Direct Link  http://www.idt.com
Logo IDT - Integrated Device Technology

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ICS853S9252BKI JUNE 14, 2017
11
©2017 Integrated Device Technology, Inc.
ICS853S9252I Datasheet
2.5V, 3.3V ECL/LVPECL CLOCK/DATA FANOUT BUFFER
Termination for 3.3V LVPECL Outputs
The clock layout topology shown below is a typical termination for
LVPECL outputs. The two different layouts mentioned are
recommended only as guidelines.
The differential outputs are low impedance follower outputs that
generate ECL/LVPECL compatible outputs. Therefore, terminating
resistors (DC current path to ground) or current sources must be
used for functionality. These outputs are designed to drive 50
transmission lines. Matched impedance techniques should be used
to maximize operating frequency and minimize signal distortion.
Figures 5A and 5B show two different layouts which are
recommended only as guidelines. Other suitable clock layouts may
exist and it would be recommended that the board designers
simulate to guarantee compatibility across all printed circuit and clock
component process variations.
Figure 5A. 3.3V LVPECL Output Termination
Figure 5B. 3.3V LVPECL Output Termination
R1
84
R2
84
3.3V
R3
125
R4
125
Z
o = 50
Z
o = 50
Input
3.3V
3.3V
+
_


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