CM7001/CM7001N

Voice and Audio Processor SOC Powered By Xear™ Sound Technologies

Datasheet Revision: 1.0

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Copyright© C-Media Electronics Inc.

 Supports flexible I/O connection and configurable signal routing paths by internal ROM codes:



analog-to-analog (default)



DMIC-to-DMIC

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I2S-to-I2S



analog-to-I2S



DMIC-to-I2S

 Allows by-passing DSP process from inputs to outputs

3.4 Control interface

 Supports 2-mode selector control input pins, or I2C control to switch among 4 chip operation modes:

Power-Down/Active /Bypass/Suspend

 Master/slave I2C control interface for interaction with the baseband, application processor, MCU, EEPROM, or

other components (supports 100kHz and 400kHz speeds; 100kHz is the default in master mode)

 Configurable UART control interface

 Supports up to 8 GPIOs (shared pins)

3.5 Power management

 Supports 4-power state/operation modes: Power-down/Active/Bypass/Suspend

 Power-down mode current (for power saving in standby/sleep states of mobile phones): < 1uA

 Active mode current (ENC-ON): ~21.16 mA (AVDD=2.8V, DVDD=1.8V, Clock=26 MHz, digital mic in/out)

 Supply current can be lower with some advanced power management configurations

 Wide power supply range with built-in LDO regulators

3.6 Audio DAC/ADC

 Embedded 2-channel audio sigma-delta ADC

 Embedded mono audio DAC

 16-bit/16kHz high-fidelity voice data conversion

 High S-N ratio: ~90 dB

 Supports mic pre-ampilifer with PGA gain: 0~+31dB, 1dB/step (default=+20dB)

 Aux-In PGA gain: -12~+19dB, 1dB/step (default=+8dB)

 Supports DAC PGA gain: 0 ~ -31dB, 1dB/step (default= -17dB)

3.7 F/W control

 Allows the baseband to read/write commands/parameters in RAM or HW registers via I2C in real-time

 Allows downloads to upgrade the entire F/W codes into instruction RAM via I2C

 Power-on loading F/W codes or customized HW and algorithm parameters from external I2C EEPROM\