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DS87C530-QNL Datasheet(PDF) 4 Page - Dallas Semiconductor |
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DS87C530-QNL Datasheet(HTML) 4 Page - Dallas Semiconductor |
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4 / 40 page  DS87C530 022197 4/40 PLCC DESCRIPTION SIGNAL NAME TQFP 3 4 5 6 7 8 9 10 48 49 50 51 52 1 2 3 Port Alternate Function P1.0 T2 External I/O for Timer/Counter 2 P1.1 T2EX Timer/Counter 2 Capture/Reload Trigger P1.2 RXD1 Serial Port 1 Input P1.3 TXD1 Serial Port 1 Output P1.4 INT2 External Interrupt 2 (Positive Edge Detect) P1.5 INT3 External Interrupt 3 (Negative Edge Detect) P1.6 INT4 External Interrupt 4 (Postive Edge Detect) P1.7 INT5 External Interrupt 5 (Negative Edge Detect) 30 31 32 33 34 35 36 37 23 24 25 26 27 28 29 30 P2.0 (AD8) P2.1 (AD9) P2.2 (AD10) P2.3 (AD11) P2.4 (AD12) P2.5 (AD13) P2.6 (AD14) P2.7 (AD15) Port 2 (A8–15) – I/O. Port 2 is a bi–directional I/O port. The reset condition of Port 2 is logic high. In this state, a weak pull–up holds the port high. This condition also serves as an input mode, since any external circuit that writes to the port will overcome the weak pull–up. When software writes a 0 to any port pin, the DS87C530 will activate a strong pull–down that remains on until either a 1 is written or a reset occurs. Writing a 1 after the port has been at 0 will cause a strong transition driver to turn on, followed by a weaker sustaining pull–up. Once the momentary strong driver turns off, the port again becomes both the output high and input state. As an alternate function Port 2 can function as MSB of the external address bus. This bus can be used to read external ROM and read/write external RAM memory or peripherals. 15–22 8–15 P3.0 – P3.7 Port 3 – I/O. Port 3 functions as both an 8–bit bi–directional I/O port and an alternate functional interface for External Interrupts, Serial Port 0, Timer 0 and 1 Inputs, and RD and WR strobes. The reset condition of Port 3 is with all bits at a logic 1. In this state, a weak pull–up holds the port high. This condition also serves as an input mode, since any external circuit that writes to the port will overcome the weak pull–up. When software writes a 0 to any port pin, the DS87C530 will activate a strong pull–down that remains on until either a 1 is written or a reset occurs. Writing a 1 after the port has been at 0 will cause a strong transition driver to turn on, followed by a weaker sustaining pull–up. Once the momentary strong driver turns off, the port again becomes both the output high and input state. The alternate modes of Port 3 are outlined below. 15 16 17 18 19 20 21 22 8 9 10 11 12 13 14 15 Port Alternate Mode P3.0 RXD0 Serial Port 0 Input P3.1 TXD0 Serial Port 0 Output P3.2 INT0 External Interrupt 0 P3.3 INT1 External Interrupt 1 P3.4 T0 Timer 0 External Input P3.5 T1 Timer 1 External Input P3.6 WR External Data Memory Write Strobe P3.7 RD External Data Memory Read Strobe 42 35 EA EA – Input. Connect to ground to force the DS87C530 to use an external ROM. The internal RAM is still accessible as determined by register settings. Connect EA to VCC to use internal ROM. 51 44 VBAT VBAT – Input. Connect to the power source that maintains SRAM and RTC when VCC < VBAT. May be connected to a 3V lithium battery or a super–cap. See the electrical specifications for details. |
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Similar Description - DS87C530-QNL |
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