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DS1094LU Datasheet(PDF) 8 Page - Dallas Semiconductor |
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DS1094LU Datasheet(HTML) 8 Page - Dallas Semiconductor |
8 / 11 page will dither between 2MHz and 1.96MHz at a modulation frequency determined by the selected dither frequen- cy. Continuing with the same example, if D1 and D0 both equal zero, selecting fMOSC/128, then the dither frequency would be 15.625kHz. 2-Wire Slave Address The 2-wire serial interface is used to read and write the control registers of the DS1094L. The default slave address of the DS1094L is B0h (see Figure 4). Using the 3 address bits (A2, A1, and A0) in the ADDR regis- ter, the slave address can be changed to allow as many as eight DS1094Ls reside on the same 2-wire bus or to simply prevent address conflicts with other 2- wire devices. The location of the address bits within the ADDR register is shown in the Control Registers sec- tion. A detailed description of the 2-wire interface is found in the 2-Wire Serial Interface Description section. EEPROM Write Control Since EEPROM does have a limited number of lifetime write cycles (specified in the NONVOLATILE MEMORY CHARACTERISTICS electrical table), it is possible to configure the DS1094L to prevent EEPROM wear out and eliminate the EEPROM write cycle time by using the WC bit in the ADDR register. When the WC bit is 0 (default), register writes are automatically written into EEPROM. The Write EE Command is not needed. However, if WC = 1, then register writes are stored in SRAM and only written to EEPROM when the user sends the Write EE Command. If power to the device is cycled, the last value stored in EEPROM is recalled. The time required to store the values is one EEPROM write cycle time. WC = 1 is ideal for applications that frequently modify the frequency/registers. Regardless of the value of the WC bit, the value of the ADDR register is always written immediately to EEP- ROM. Control Registers The DS1094L control registers are used to program the frequency and features of the device. Table 6 lists the DS1094L’s control registers and illustrates bit locations as well as other valuable information. The memory address of each register is shown in the ADDRESS col- umn. The factory default values programmed into EEP- ROM are shown in the DEFAULT column. Refer to the corresponding sections to determine what values to write to the registers. PRESCALER (02h) D1, D0 Selects the dither frequency. Refer to Table 5. Ph1, Ph0 Determines whether the two-phase, three- phase, or four-phase mode is selected. Refer to Table 3. J1, J0 Selects the dither amount. Refer to Table 4. P1, P0 Determines the prescaler value. Refer to Table 2. DAC (08h) D3 to D0 This four-bit value determines the master oscil- lator frequency, fMOSC. Refer to Table 1 and the Master Oscillator section for a detailed information on calculating the DAC value. ADDR (0Dh) WC The EEPROM write control bit determines if writes to control registers are automatically backed up in NV memory (EEPROM) or whether a write EE command is required to write to NV memory. See the EEPROM Write Control section for more information. A2 to A0 This three-bit value determines the 2-wire slave address. WRITE EE COMMAND (3Fh) This command can be used when the WC bit = 1 (see explanation in the EEPROM Write Control section) to transfer registers internally from SRAM to EEPROM. The time required to store the values is one EEPROM write cycle time. This command is not needed if WC = 0. Multiphase Spread-Spectrum EconOscillator 8 _____________________________________________________________________ BINARY REGISTER ADDRESS MSB LSB DEFAULT ACCESS PRESCALER 02h D1 D0 Ph1 Ph0 J1 J0 P1 P0 11001101b R/ W DAC 08h X1 X1 X1 X1 D3 D2 D1 D0 XXXX0000b R/ W ADDR 0Dh X1 X1 X1 X1 WC A2 A1 A0 XXXX0000b R/ W WRITE EE Command 3Fh No Data W Table 6. Control Registers X = Don’t care X1 = Don’t care, reads as 1 |
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