 |
Electronic Components Datasheet Search |
|
|
Electronic Components Datasheet Search |
|
ADV7185 Datasheet(PDF) 1 Page - Analog Devices |
|
||||||||||||||||||||||||||||||
ADV7185 Datasheet(HTML) 1 Page - Analog Devices |
|
|
1 / 40 page  REV. 0 a Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781/329-4700 www.analog.com Fax: 781/326-8703 © Analog Devices, Inc., 2002 ADV7185 Professional NTSC/PAL Video Decoder with 10-Bit CCIR656 Output ADLLT is a trademark and ADV is a registered trademark of Analog Devices, Inc. FEATURES Analog Video to Digital YCrCb Video Decoder: NTSC-(M/N), PAL-(B/D/G/H/I/M/N) ADV ®7185 Integrates Two 12-Bit ADCs Clocked from a Single 27 MHz Crystal Dual Video Clocking Schemes: Line-Locked Clock Compatible (LLC) Adaptive Digital Line Length Tracking (ADLLT™) 3-Line Chroma Comb Filter Real-Time Clock and Status Information Output Integrated AGC (Automatic Gain Control) and Clamping Multiple Programmable Analog Input Formats: CVBS (Composite Video) SVHS (Y/C) YCrCb Component (VESA, MII, SMPTE, and BetaCam) 6 Analog Input Video Channels Real-Time Horizontal and Vertical Scaling Automatic NTSC/PAL Identification Differential Mode Video Input FUNCTIONAL BLOCK DIAGRAM ISO REFOUT AIN1 AIN2 AIN3 AIN4 AIN5 AIN6 ANALOG I/P MULTIPLEXING AUTOMATIC GAIN CONTROL (AGC) CLAMP AND DC RESTORE 12-BIT ADC LUMA ANTIALIAS LPF SHAPING AND NOTCH LPF PEAKING HPF/LPF RESAMPLING AND HORIZONTAL SCALING SYNC DETECTION ADV7185 RESAMPLING AND HORIZONTAL SCALING CHROMA ANTIALIAS LPF SHAPING LPF SWITCH LUMA DELAY BLOCK 2H LINE MEMORY SUB- CARRIER RECOVERY DTO 12-BIT ADC 27MHz VIDEO TIMING AND CONTROL BLOCK 27MHz XTAL OSCILLATOR BLOCK PWRDN HSYNC FIELD VSYNC HREF VREF CLOCK CLOCK AFF HFF/QCLK AEF DV RD OE FIFO CONTROL BLOCK AND PIXEL OUTPUT FORMATTER LLC SYNTHESIS WITH LINE- LOCKED OUTPUT CLOCK I2C-COMPATIBLE INTERFACE PORT SDATA SCLOCK RESET ALSB GL/CLKIN LLC1 LLC2 LLCREF ELPF P19–P0 PIXEL O/P PORT CHROMA COMB FILTER Digital Output Formats (20-Bit Wide Bus): YCrCb (4:2:2 or 4:1:1) CCIR601/CCIR656 8-Bit or Extended 10-Bit 0.5 V to 2.0 V p-p Input Range Differential Gain, 0.4% Typ Differential Phase, 0.6o Typ Programmable Video Controls: Peak White/Hue/Brightness/Saturation/Contrast CCIR/Square/4 FSC Pixel Operation APPLICATIONS Projectors Digital TVs DVD-RAM Recorders and Players PDP Displays Video Decoders Hybrid Analog/Digital Set-Top Boxes Professional Equipment (continued on page 9) |
Similar Part No. - ADV7185 |
|
Similar Description - ADV7185 |
|
|
Link URL |
| Privacy Policy |
| ALLDATASHEET.COM |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Datasheet Upload | Contact us | Privacy Policy | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
English ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
