7

ADMtek

Partnership Now & Future

Randomly generated IV (Initialization Vector) for TX.

ICV (Integrity Check Value) generation and check.

4 default shared key supported.

TA/RA WEP individual key management with a 20-entry table.

2.5

WLAN TX/RX FIFO

Provides two independent long FIFOs with 4k bytes each for transmission and receiving

Bus master descriptor based host memory access

Pre-fetch up to two transmit packets to guarantee standard inter frame space (IFS)

Re-transmits no-ACKed packet without reloading from host memory.

Support two TX descriptors for DCF and PCF application

Automatically re-transmitting if TX under-run happened.

2.6

WLAN Synthesizer Interface

Support RFMD compatible interface

2.7

EEPROM Interface

Provides serial interface for read/write 93C46/93C66 EEPROM

Automatically loads device ID, vendor ID, subsystem ID, subsystem vendor ID,

Maximum-Latency, and Minimum-Grand from the 64 byte contents of 93C46/93C66 after

PCI reset de-asserted in PCI environment.

CIS data is recalled from 93C66 through ADM8211 in CARDBUS environment.

2.8

LED Display

Power: Power on indication

Link: Keep on while link

Activity: Blinking at 10Hz while activity

2.9

Miscellaneous

Low power application

Support 3 GPIO pins

CMOS .25um Process

Provides 156/BGA package

On chip 3.3V ~ 2.5V regulator

3.3V power supply with 5V/3.3V I/O tolerance