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AAT1154 Datasheet(PDF) 11 Page - Advanced Analogic Technologies |
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AAT1154 Datasheet(HTML) 11 Page - Advanced Analogic Technologies |
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11 / 18 page  3 Amp Surface Mount Schottky Diodes Input Capacitor Selection The primary function of the input capacitor is to pro- vide a low impedance loop for the edges of pulsed current drawn by the AAT1154. A low ESR/ESL ceramic capacitor is ideal for this function. To mini- mize the stray inductance the capacitor should be placed as close as possible to the IC. This also keeps the high frequency content of the input cur- rent localized, minimizing the radiated and con- ducted EMI while facilitating optimum performance of the AAT1154. The proper placement of the input capacitor C1 is shown in the layout in figure 1. Ceramic X5R or X7R capacitors are ideal. The size required will vary depending on the load, out- put voltage, and input voltage source impedance characteristics. Typical values range from 1µF to 10 µF. The input capacitor RMS current varies with the input voltage and the output voltage. It is high- est when the input voltage is double the output volt- age where it is one half of the load current. A high ESR tantalum with a value about 10 times the input ceramic capacitor may also be required when using a 10µF or smaller ceramic input bypass capacitor. This dampens out any input oscillations that may occur due to the source inductance res- onating with the converter input impedance Output Capacitor With no external compensation components, the output capacitor has a strong effect on the loop sta- bility. Larger output capacitance will reduce the crossover frequency with greater phase margin. A 200µF ceramic capacitor provides sufficient bulk capacitance to stabilize the output during large load transitions and has ESR and ESL characteristics necessary for very low output ripple. The RMS rip- ple current is given by For a ceramic output capacitor the dissipation due to the RMS current and output ripple associated with are negligible. Tantalum capacitors, with sufficiently low ESR to meet output ripple requirements, generally have an RMS current rating much greater than that actually seen in this application. The maximum tantalum output capacitor ESR is Where ∆I is the peak to peak inductor ripple current. Due to the ESR zero associated with the tantalum capacitor, smaller values than those required with ceramic capacitors provide more phase margin a with greater loop crossover frequency. Layout Figures 1 and 2 display the suggested PCB layout for the AAT1154. The following guidelines should be used to help insure a proper layout. 1. The connection from the input capacitor to the Schottky anode should be as short as possible. 2. The input capacitor should connect as closely as possible to VPOWER (pins 5 and 8) and GND (pin 2). 3. C1, L1, and CR1 should be connected as closely as possible. The connection from the cath- ode of the Schottky to the LX node should be as short as possible. 4. The feedback trace (pin 1) should be separate from any power trace and connect as closely as possible to the load point. Sensing along a high current load trace can degrade DC load regulation. 5. The resistance of the trace from the load return to the gnd (pin 2) should be kept to a mini- mum. This will help to minimize any error in DC regulation due to differences in the potential of the internal reference ground and the load rtn. 6. R1 and C3 are required in order to provide a cleaner power source for the AAT1154 control circuitry. RIPPLE V ESR ≤ ∆I () () 1 23 OUT FWD IN OUT RMS IN VV V V I LF V +· - =· ·· · 1 O O O RMS IN IN VV II VV = · · - Diodes Inc. B340LA 0.45V@3A ROHM RB050L-40 0.45@3A Micro Semi 5820SM 0.46V@3A AAT1154 1MHz 3A Buck DC/DC Converter 1154.2003.08.0.91 11 |
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Similar Description - AAT1154 |
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