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LP3906SQXJXXI Datasheet(PDF) 7 Page - National Semiconductor (TI) |
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LP3906SQXJXXI Datasheet(HTML) 7 Page - National Semiconductor (TI) |
7 / 38 page Electrical Characteristics (Continued) Low Drop Out Regulators, LDO1 and LDO2 Unless otherwise noted, V IN = 3.6, CIN = 1.0 µF, COUT = 0.47 µF. Typical values and limits appearing in normal type apply for T J = 25˚C. Limits appearing in boldface type apply over the entire junction temperature range for operation, −40˚C to +125˚C. (Notes 2, 7, 8, 9, 10, 11, 12) Symbol Parameter Conditions Min Typ Max Units V IN Operational Voltage Range VINLDO1 and VINLDO2 PMOS pins(Note 15) 1.74 5.5 V V OUT Accuracy Output Voltage Accuracy (Default V OUT) Load current=1mA −3 3 % ∆V OUT Line Regulation V IN =(VOUT + 0.3V) to 5.0V, (Note 12), Load Current=1mA 0.15 %/V Load Regulation V IN = 3.6V, Load Current=1mAtoI MAX 0.011 %/mA I SC Short Circuit Current Limit LDO1-2, V OUT = 0V 500 mA V IN –VOUT Dropout Voltage Load Current = 50 mA (Note 10) 25 200 mV PSRR Power Supply Ripple Rejection F = 10 kHz, Load Current = I MAX 45 dB θn Supply Output Noise 10 Hz < F < 100 KHz 80 µVrms I Q (Notes 11, 14) Quiescent Current “On” I OUT =0mA 40 µA Quiescent Current “On” I OUT =IMAX 60 µA Quiescent Current “Off” EN is de-asserted(Note 16) 0.03 µA T ON Turn On Time Start up from shut-down 300 µs C OUT Output Capacitor Capacitance for stability 0˚C ≤ T J ≤ 125˚C 0.33 0.47 µF −40˚C ≤ T J ≤ 125˚C 0.68 1.0 µF ESR 5 500 m Ω Buck Converters SW1, SW2 Unless otherwise noted, V IN = 3.6, CIN = 10 µF, COUT = 10 µF, LOUT = 2.2 µH ceramic. Typical values and limits appearing in normal type apply for T J = 25˚C. Limits appearing in boldface type apply over the entire junction temperature range for opera- tion, −40˚C to +125˚C. (Notes 2, 7, 8, 9, 14) Symbol Parameter Conditions Min Typ Max Units V OUT Output Voltage Accuracy Default V OUT −3 +3 % Line Regulation 2.7< V IN < 5.5 I O =10 mA 0.089 %/V Load Regulation 100 mA < I O < IMAX 0.0013 %/mA Eff Efficiency Load Current = 250 mA 96 % I SHDN Shutdown Supply Current EN is de-asserted 0.01 µA f OSC Sync Mode Clock Frequency Synchronized from 13 MHz system clock 2.0 MHz Internal Oscillator Frequency 2.0 MHz I PEAK Peak Switching Current Limit 2.0 A I Q (Note 14) Quiescent Current “On” No load PFM Mode 33 µA R DSON (P) Pin-Pin Resistance PFET 200 m Ω R DSON (N) Pin-Pin Resistance NFET 180 m Ω T ON Turn On Time Start up from shut-down 500 µs C IN Input Capacitor Capacitance for stability 10 µF C O Output Capacitor Capacitance for stability 10 µF www.national.com 7 |
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