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A8650KLYTR-T Datasheet(PDF) 1 Page - Allegro MicroSystems |
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A8650KLYTR-T Datasheet(HTML) 1 Page - Allegro MicroSystems |
1 / 31 page Description The A8650 is an adjustable frequency, high output current, PWMregulatorthatintegratesahigh-side,P-channelMOSFET and a low-side, N-channel MOSFET. TheA8650 incorporates current-modecontroltoprovidesimplecompensation,excellent loop stability, and fast transient response. The A8650 utilizes external compensation to accommodate a wide range of power components to optimize transient response without sacrificing stability. TheA8650 regulates input voltages from 2.5 to 5.5 V, down to output voltages as low as 0.8 V, and is able to supply at least 2.0 A of load current. A8650 features include an externally adjustable switching frequency, an externally set soft start time to minimize inrush currents, an EN/SYNC input to either enable VOUT and/or synchronize the PWM switching frequency, and a Power OK (POK) output to indicate when VOUT is within regulation. The sleep mode current of the A8650 control circuitry is less than 3 μA. Protection features include VIN undervoltage lockout A8650-DS, Rev. 8 Features and Benefits • Automotive AEC-Q100 qualified • Operating voltage range: 2.5 to 5.5 V • UVLO stop threshold: 2.25 V (max) • Adjustable switching frequency (fOSC): 0.25 to 2.45 MHz • Synchronizes to external clock: 1.2× to 1.5× fOSC (typ) • Internal 70 mΩ high-side switching MOSFET • Internal 55 mΩ low-side switching MOSFET • Capable of at least 2.0 A steady-state output current • Sleep mode supply current less than 3 μA • Adjustable output voltage as low as 0.8 V with ±1% accuracy from –40°C to 125°C • Soft start time externally set via the SS pin • Pre-biased startup capable • Externally adjustable compensation Low Input Voltage, Adjustable Frequency 2 A Synchronous Buck Regulator with EN/SYNC and Power OK Packages: Not to scale A8650 Continued on the next page… Continued on the next page… Applications: • GPS/Infotainment • Automobile Audio • Home Audio • Network and Telecom Typical Application Diagram Typical application schematic, configured for VIN = 5 V, VOUT = 1.8 V, IOUT = 2.0 A at 2 MHz CIN2 0.1 µF 0805 CIN3 10 nF 0603 CO2 10 µF 1206 CO3 0.1 µF 0805 CO4 10 nF 0603 A8650 SS 8 EN/SYNC 3 FSET 5 VIN 10 GND 9 POK 4 FB 7 COMP 6 PGND 2 SW 1 VOUT RFB2 7.15 kΩ RFB1 9.09 kΩ CSS 10 nF CIN1 3.3 µF 1206 RFSET 10.7 kΩ VIN EN/SYNC POK RZ 6.65 kΩ CP 22 pF CZ 1.5 nF LO 1.0 µH RPU 10 kΩ CO1 10 µF 1206 3.3V 10-pin MSOP with exposed thermal pad (suffix LY) 10-pin DFN with exposed thermal pad (suffix EJ) Features and Benefits Description |
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