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A8603KESTR-J Datasheet(PDF) 6 Page - Allegro MicroSystems |
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A8603KESTR-J Datasheet(HTML) 6 Page - Allegro MicroSystems |
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6 / 42 page  Multiple-Output Regulator for Automotive LCD Displays A8603 6 Allegro MicroSystems, LLC 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com Characteristics Symbol Test Conditions Min. Typ. Max. Unit INPUT VOLTAGE AND CURRENT Input Voltage VIN • 3 – 10 V VIN Pin Undervoltage Lockout (UVLO) Threshold VUVLO VIN rising • – 2.8 2.9 V VIN Pin UVLO Hysteresis VUVLO(HYS) – 0.15 0.25 V BIAS Voltage VBIAS Internal BIAS regulator, EN = high – 2.8 – V Shutdown BIAS Current [1] IVINBIAS(SD) Current into VIN pin, EN = low • – 1 10 µA Standby BIAS Current IVINBIAS(STB) EN = high, output disabled – 3 – mA Operating BIAS Current IVINBIAS(OP) EN = high, output enabled – 6 – mA BOOST SWITCH Switch Peak Current Limit ISWILIM Cycle-by-cycle current limit • 2.2 2.6 3 A Switch Secondary Current Limit ISWILIM2 Trips SW_OCP fault if exceeded – 3.7 – A Switch On-Resistance RDS(on) ISW = 0.4 A – 0.4 0.7 Ω Switch Minimum On-Time tON(MIN) • – 65 120 ns Switch Minimum Off-Time tOFF(MIN) • – 60 100 ns SW Pin Leakage Current ISW(LKG) VSW = 5 V, EN = low – 0.1 – µA VOUT Pin Leakage Current IOUT(LKG) VOUT = 5 V, EN = low – 0.1 – µA VOUT = 10 V, EN = low – 25 37 µA SW Pin Overvoltage Protection Threshold VSW(OVP) Measured from SW to GND • 18.6 21 23 V SW OVP Detection Time [2] tSW(OVP) Minimum pulse width required for VSW ≥ VSW(OVP) to be detected as SW OVP – 40 – ns SW OVP to Shutdown Delay [2] tFAULT(OVP) Delay from SW OVP to FAULT = L – 1 2.5 µs SWITCHING FREQUENCY/SYNCHRONIZATION FSET_SYNC Pin Voltage VFSETSYNC Without using external synchronization signal – 0.64 – V FSET_SYNC Pin Current IFSETSYNC 22 – 140 µA Switching Frequency fSW RFSET_SYNC = 5.1 kΩ • 1.8 2 2.2 MHz Synchronization Frequency fSYNC External logic sugnal connected to FSET_ SYNC pin • 0.35 – 2.25 MHz Synchronization Minimum On-Time tSYNC(ON) • 150 – – ns Synchronization Minimum Off-Time tSYNC(OFF) • 150 – – ns Switching Frequency Dithering Range ΔfSW0 No external synch, REG0x10 = ‘00b’ – 0 – % No external synch, REG0x10 = ‘01b’ – 5 – % No external synch, REG0x10 = ‘10b’ – 10 – % No external synch, REG0x10 = ‘11b’ – 15 – % ELECTRICAL CHARACTERISTICS [1]: Valid at VIN = 5 V, EN = high, fSW = 2 MHz, VAVDD = 10 V, VVGH1 = 20 V, VVGL = –8 V, TJ = TA = 25°C, except • indicates specifications guaranteed for TJ = TA = −40°C to 125°C, unless otherwise specified Continued on the next page… |
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