Preliminary
14-42
SiW3500
60 0066 R00Hrf SiW3500 Radio Processor DS
Volts to maintain compatibility with a wide range of peripheral devices. Please check the pin list for the exact pins that are
powered from the VDD_P and VDD_P_ALT sources.
RF I/O Description
The SiW3500 employs single-ended RF input and output pins for reduced external components. In typical Class 2 (0
dBm nominal) applications, no external matching components are necessary.
On-Chip Memory
The SiW3500 Radio Processor integrates both SRAM and ROM. The ROM is pre-programmed with Bluetooth protocol
stack software (HCI software) and boot code that executes automatically upon reset. The boot code serves to control the
boot sequence as well as to direct the execution to the appropriate memory for continued operation.
Configuration Selection
Reference Frequency Selection
The SiW3500 is designed to operate with multiple reference frequencies. During boot, specific frequency select I/O pins
are sampled to determine the default reference frequency. The reference frequency setting will be set according to the
following table:
Application Software Memory Selection
The SiW3500 can support application (protocol stack) software execution from internal ROM or external FLASH
memory. To run from internal ROM, pins D[9] and D[10] must be connected together as shown in the application circuit
section of this document (Application Circuit). To run from external flash memory, the flash must be connected as shown
in the application circuit diagram and contain valid application code. If the external memory does not have valid program
data, the device enters a download mode in which a valid program may be loaded into the external memory through a
sequence of commands over the HCI transport layer.
FREQ_SEL3
(MFP[3])
FREQ_SEL2
(MFP[5])
FREQ_SEL1
(MFP[4])
FREQ_SEL0
(ADC_IN)
Frequency
00
00
15.36 MHz
0
0
0
1
19.2 MHz
00
10
19.44 MHz
00
11
19.68 MHz
0
1
0
0
19.8 MHz
01
01
26 MHz
0
1
1
0
38.4 MHz
01
11
Do not program frequency (leave as ref/2 and set
according to system parameters).
1
0
X
X
32 MHz
11
00
32 MHz
11
01
12 MHz
11
10
13 MHz
1
1
1
1
14.4 MHz