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AD7771 Datasheet(PDF) 13 Page - Analog Devices |
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AD7771 Datasheet(HTML) 13 Page - Analog Devices |
13 / 14 page Rev. PrC | Page 12 of 13 Pin No. Mnemonic Type Direction Description 26 DOUT2 Digital Output IO Data output pin 2. If the part is configured in daisy-chain mode, this pin acts as an input pin. 27 DOUT1 Digital Output Output Data output pin 1 28 DOUT0 Digital Output Output Data output pin 0 29 DCLK Digital Output Output Data Output Clock 30 DRDY Digital Output Output Data Output Ready 31 XTAL1 Clock Input XTAL1 input connection, If CMOS is used as a clock source, connect tie this pin to DGND. 32 XTAL2/MCLK Clock Input XTAL2 input connection or CMOS clock 33 START Digital Input Input Synchronization pulse. This pin is used to synchronize internally an external START asynchronous pulse with MCLK. The synchronize signal is shift out by SYNC_OUT pin.Tie to DGND is not used. 34 SYNC_OUT Digital Output Input Synchronization signal. This pin generates a synchronous pulse 35 SYNC_IN Digital Input Input SYNC_IN reset the internal SINC filters. 36 RESET Digital Input Input Asynchronous Reset Pin. Resets all registers to default value. I 37 AIN7+ Analog Input Input Analog Input Channel 7 38 AIN7− Analog Input Input Analog Input Channel 7 39 AIN6+ Analog Input Input Analog Input Channel 6 40 AIN6− Analog Input Input Analog Input Channel 6 41 REF2+ Reference Input Positive Reference Input 1 for Channels 4 to 7, recommended value REF2 − + 2.5V 42 REF2− Reference Input Negative Reference Input for Channels 4 to 7, typically AVSSx. Connect all REFx − pins to the same potential 43 AVDD1B Supply Supply Positive Front End Analog Supply for Channels 4 to 7. This pin should be connected together with AVDD1A 44 AVSS1B Supply Supply Negative Front End Analog Supply for Channels 4 to 7, typical -1.65V(Dual Supply) or AGND (Single Supply). Connect all AVSSx pins together 45 AIN5+ Analog Input Input Analog Input Channel 5 46 AIN5− Analog Input Input Analog Input Channel 5 47 AIN4+ Analog Input Input Analog Input Channel 4 48 AIN4− Analog Input Input Analog Input Channel 4 49 REF_OUT Reference Output 2.5V Reference Output 50 AVSS2B Supply Supply Negative Analog supply. Connect all AVSSx pins together. 51 AReg2Cap Supply Output Analog LDO output. Decouple to AVSS2 with 1uF cap 52 AVDD2B Supply Supply Positive Analog supply, this pin should be connected together with AVDD2A 53 AVSS3 Supply Supply Negative Analog Ground. Connect all AVSSx pins together 54 FORMAT1 Digital Input Input Output data frame, 55 FORMAT0 Digital Input Input Output data frame, 56 CLK_SEL Digital Input Input Select Clock Source, 57 VCM Analog Output Output Common Mode Voltage Output, (AVDD1−AVSS)/2 58 AVDD2A Supply Input Analog supply, from 2.2V to 3.6V. AVSS2x should not be lower than ARegxCap. AVSS2x should not be lower than ARegxCap.Connected This pin should be connected together with AVDD2B 59 AReg1Cap Supply Output Analog LDO output. Decouple to AVSS with 1uF cap. AD7771 Preliminary Technical Data |
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