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70P247L55BYGI Datasheet(PDF) 3 Page - Integrated Device Technology |
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70P247L55BYGI Datasheet(HTML) 3 Page - Integrated Device Technology |
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3 / 23 page  6.42 IDT70P257/247L Low Power 1.8V 8K/4K x 16 Dual-Port Static RAM Industrial Temperature Range 3 Pin Names Left Port Right Port Names CEL CER Chip Enable (Input) R/ WL R/ WR Read/Write Enable (Input) OEL OER Output Enable (Input) A0L - A12L(1) A0R - A12R(1) Address (Input) I/O0L - I/O15L I/O0R - I/O15R Data Input/Output SEML SEMR Semaphore Enable (Input) UBL UBR Upper Byte Select (Input) LBL LBR Lower Byte Select (Input) INTL INTR Interrupt Flag (Output) BUSYL BUSYR Busy Flag IRR0, IRR1 Input Read Register (Input) ODR0 - ODR4 Output Drive Register (Output) SFEN(2) Special Function Enable (Input) M/ S Master or Slave Select (Input) VDD Power (1.8V) (Input) VSS Ground (0V) (Input) 5684 tbl 01 NOTE: 1. A12X is a NC for IDT70P247. 2. SFEN is active when either CEL = VIL or CER = VIL. SFEN is inactive when CEL = CER = VIH. NOTE: 1. A0L — A12L ≠ A0R — A12R for IDT70P257; A0L — A11L ≠ A0R — A11R for IDT70P247. Truth Table I: Non-Contention Read/Write Control Inputs(1) Outputs Mode CE R/ W OE UB LB SEM I/O8-15 I/O0-7 H X X X X H High-Z High-Z Deselected: Power Down X X X H H H High-Z High-Z Both Bytes Deselected LL X L H H DATAIN High-Z Write to Upper Byte Only LL X H L H High-Z DATAIN Write to Lower Byte Only LL X L L H DATAIN DATAIN Write to Both Bytes L H LLH H DATAOUT High-Z Read Upper Byte Only LH LH LH High-Z DATAOUT Read Lower Byte Only LH L L LH DATAOUT DATAOUT Read Both Bytes X X H X X X High-Z High-Z Outputs Disabled 5684 tbl 02 |
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