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MAX3747-MAX3747A Datasheet(PDF) 7 Page - Maxim Integrated Products |
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MAX3747-MAX3747A Datasheet(HTML) 7 Page - Maxim Integrated Products |
7 / 10 page Detailed Description The limiting amplifiers consist of a multistage amplifier, offset-correction circuitry, an output buffer, and loss-of- signal detect circuitry (see the Functional Diagram). Input Stage The input stage is shown in Figure 3. It provides 50 Ω termination to VREF for each input signal, IN+ and IN-. The MAX3747/MAX3747A should be AC-coupled. Multistage Amplifier The high-bandwidth multistage amplifier provides approximately 57dB of gain for the MAX3747 and 61dB of gain for the MAX3747A. Offset Correction Loop The MAX3747/MAX3747A are susceptible to DC offsets in the signal path because they have high gain. In com- munication systems using NRZ data with a 50% duty cycle, pulse-width distortion present in the signal or gen- erated in the transimpedance amplifier appears as an input offset and is reduced by the offset correction loop. The offset correction loop sets a low-frequency cutoff of 3.2kHz. 155Mbps to 3.2Gbps, Low-Power SFP Limiting Amplifiers _______________________________________________________________________________________ 7 Pin Description MAX3747/ MAX3747A MICREL SY8893V PIN NAME NAME FUNCTION 1 DISABLE EN Disable Function Pin. The data outputs are held static when this pin is asserted high, transistor-to-transistor logic (TTL). 2 IN+ DIN Noninverted Input Signal, CML 3 IN- DIN Inverted Input Signal, CML 4VREF VREF Reference Voltage for LOS Threshold Setting 5TH LOSLVL Loss-of-Signal Level Set. A voltage on this pin created by a two-resistor divider sets the threshold level. Connect one resistor from this pin to VCC and another from this pin to VREF (see Figure 5). 6 GND GND Ground 7 LOS LOS Loss-of-Signal, Open Collector. LOS is high when the level of the input signal drops below the preset threshold set by the TH input. LOS is deasserted low when the signal level is above the threshold. 8 OUT- DOUT Inverted Data Output, CML 9 OUT+ DOUT Noninverted Data Output, CML 10 VCC VCC Positive Power Supply MAX3747 MAX3747A 50 Ω 50 Ω VREF VCC ESD STRUCTURES Figure 3. CML Input Stage |
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Similar Description - MAX3747-MAX3747A |
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