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LT6010CDD Datasheet(PDF) 11 Page - Linear Technology |
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LT6010CDD Datasheet(HTML) 11 Page - Linear Technology |
11 / 16 page LT6010 11 6010f APPLICATIO S I FOR ATIO Offset Voltage Adjustment The input offset voltage of the LT6010 and its drift with temperature are permanently trimmed at wafer testing to the low level as specified in the electrical characteristic. However, if further adjustment of VOSisdesired,nullingwith a 50k potentiometer is possible and will not degrade drift with temperature. Trimming to a value other than zero + – 6010 F01a 3 2 1 8 LT6010 INPUT OUTPUT VCC Vee 50k 4 6 7 + – 6010 F02a 3 2 1 8 LT6010 10k 50k 10k 4 6 7 INPUT OUTPUT VCC Vee POTENTIOMETER POSITION 0 0.2 0.4 0.6 0.8 1.0 6010 F01b 1.0 0.8 0.6 0.4 0.2 0 –0.2 –0.4 –0.6 –0.8 –1.0 POTENTIOMETER POSITION 0 1.0 6010 F02b –200 200 150 100 50 0 –50 –100 –150 0.2 0.4 0.6 0.8 Standard Adjustment Improved Sensitivity Adjustment Figure 1A Figure 1B Figure 2A Figure 2B creates a drift of (VOS/300µV) µV/°C, e.g., if VOS is adjusted to 300 µV,thechangeindriftwillbe1µV/°C.Theadjustment range with a 50k pot is approximately ±0.9mV (see Figures 1A and 1B). The sensitivity and resolution of the nulling can be improved by using a smaller pot in conjunction with fixed resistors. The configuration shown has an approximate nulling range of ±150µV (see Figures 2A and 2B). |
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