Precision Hall-Effect Angle Sensor IC

A1334

3

Allegro MicroSystems, LLC

115 Northeast Cutoff

Worcester, Massachusetts 01615-0036 U.S.A.

1.508.853.5000; www.allegromicro.com

VCC

A1334

VCC_1

SCLK_1

SCLK_2

MISO_1

MOSI_1

MOSI_2

MISO_2

BYP_1

VCC_2

BYP_2

BIAS_2

BIAS_1

AGND_2

AGND_1

DGND_2

DGND_1

0.1 µF

0.1 µF

0.1 µF

Host

Microprocessor

CS_1

CS_2

Target

Magnet

Typical Application Diagram (Dual Die Version)

Either or both internal SoCs can be operated simultaneously. (See page 12 for circuits that require a higher level of EMC immunity.)

Terminal List Table

PinName

Pin Number

Function

LE-14

LE-24

AGND_1

4, 7, 9

4, 6

Device analog ground terminal (die 1)

AGND_2

–

16, 18

Device analog ground terminal (die 2)

BYP_1

2

2

External bypass capacitor terminal for internal regulator (die 1)

BYP_2

–

14

External bypass capacitor terminal for internal regulator (die 2)

CS_1

13

23

SPI Chip Select terminal, active low (die 1)

CS_2

–

11

SPI Chip Select terminal, active low (die 2)

DGND_1

1, 3, 14

1, 3, 24

Device digital ground terminal (die 1)

DGND_2

–

12, 13, 15

Device digital ground terminal (die 2)

MISO_1

10

20

SPI Master Input / Slave Output (die 1)

MISO_2

–

8

SPI Master Input / Slave Output (die 2)

MOSI_1

12

22

SPI Master Output / Slave Input (die 1)

MOSI_2

–

10

SPI Master Output / Slave Input (die 2)

SCLK_1

11

21

SPI Clock terminal (die 1)

SCLK_2

–

9

SPI Clock terminal (die 2)

VCC_1

5, 6

5

Power supply; also used for EEPROM programming (die 1)

VCC_2

–

17

Power supply; also used for EEPROM programming (die 2)

BIAS_1

8

19

Bias connection; connect to ground (shown) or pull-up to 3.3 V (die 1)

BIAS_2

–

7

Bias connection; connect to ground (shown) or pull-up to 3.3 V (die 2)

Pin-Out Diagrams and Terminal List Table

DGND_1

BYP_1

DGND_1

AGND_1

VCC_1

AGND_1

BIAS_2

MISO_2

SCLK_2

MOSI_2

CS_2

DGND_2

DGND_1

CS_1

MOSI_1

SCLK_1

MISO_1

BIAS_1

AGND_2

VCC_2

AGND_2

DGND_2

BYP_2

DGND_2

1

2

3

4

5

6

7

8

9

10

11

12

24

23

22

21

20

19

18

17

16

15

14

13

LE-14 Package

(Single SoC)

LE-24 Package

(Dual SoC)

DGND

BYP

DGND

AGND

VCC

VCC

AGND

1

2

3

4

5

6

7

14

13

12

11

10

9

8

DGND

CS

MOSI

SCLK

MISO

AGND

BIAS