AS8C403625 datasheet(1/19 Pages) ALSC

Part #	AS8C403625

Description	Power down controlled by ZZ input

Download	19 Pages

Scroll/Zoom	100%

Manufacturer	ALSC [Alliance Semiconductor Corporation]

Direct Link	https://www.alliancememory.com

Logo

1 / 19 page

SEPTEMBER

2010

DSC-5280/08

1

.

Features

◆ 128K x 36, 256K x 18 memory configurations

◆

◆ Supports fast access times:

Commercial:

– 7.5ns up to 117MHz clock frequency

◆

LBO input selects interleaved or linear burst mode

◆

◆ Self-timed write cycle with global write control (

GW),bytewrite

enable (

BWE), and byte writes (BWx)

◆

◆ 3.3V core power supply

◆

◆ Power down controlled by ZZ input

◆

◆ 3.3V I/O

◆

◆ Optional - Boundary Scan JTAG Interface (IEEE 1149.1

compliant)

◆

◆ Packaged in a JEDEC Standard 100-pin plastic thin quad

flatpack (TQFP),

Pin Description Summary

NOTE:

1.

BW3 and BW4 are not applicable for the

AS8C401825.

Description

TheAS8C403625/1825 are high-speed SRAMs organized as

128K x 36/256K x 18. The AS8C403625/1825 SRAMs contain write, data,

address and control registers. There are no registers in the data output

path (flow-through architecture). Internal logic allows the SRAM to gen-

erate a self-timed write based upon a decision which can be left until the

end of the write cycle.

The burst mode feature offers the highest level of performance to the

system designer, as the AS8C403625/1825 can provide four cycles of data

for a single address presented to the SRAM. An internal burst address

counter accepts the first cycle address from the processor, initiating the

access sequence. The first cycle of output data will flow-through from the

array after a clock-to-data access time delay from the rising clock edge of

the same cycle. If burst mode operation is selected (

ADV=LOW), the

subsequent three cycles of output data will be available to the user on the

next three rising clock edges. The order of these three addresses are

defined by the internal burst counter and the

LBO input pin.

The AS8C403625/1825 SRAMs utilize IDT’s latest high-performance

CMOS process and are packaged in a JEDEC standard 14mm x 20mm

100-pin thin plastic quad flatpack (TQFP)

A0-A17

Address Inputs

Input

Synchronous

CE

Chip Enable

Input

Synchronous

CS0,

CS1

Chip Selects

Input

Synchronous

OE

Output Enable

Input

Asynchronous

GW

Global Write Enable

Input

Synchronous

BWE

Byte Write Enable

Input

Synchronous

BW1, BW2, BW3, BW4(1)

Individual Byte Write Selects

Input

Synchronous

CLK

Clock

Input

N/A

ADV

Burst Address Advance

Input

Synchronous

ADSC

Address Status (Cache Controller)

Input

Synchronous

ADSP

Address Status (Processor)

Input

Synchronous

LBO

Linear / Interleaved Burst Order

Input

DC

TMS

Test Mode Select

Input

Synchronous

TDI

Test Data Input

Input

Synchronous

TCK

Test Clock

Input

N/A

TDO

Test Data Output

Output

Synchronous

TRST

JTAG Reset (Optional)

Input

Asynchronous

ZZ

Sleep Mode

Input

Asynchronous

I/O0-I/O31, I/OP1-I/OP4

Data Input / Output

I/O

Synchronous

VDD, VDDQ

Core Power, I/O Power

Supply

N/A

VSS

Ground

Supply

N/A

5280 tbl 01

128K X 36, 256K X 18

3.3V Synchronous SRAMs

3.3V I/O, Flow-Through Outputs

Burst Counter, Single Cycle Deselect

AS8C403625

AS8C401825

Similar Part No. - AS8C403625

Manufacturer	Part #	Datasheet	Description
Alliance Semiconductor ...	AS8C403600	2Mb / 17P	Power down controlled by ZZ input
	AS8C403601	7Mb / 21P	three chip enables for simple depth expansion
	AS8C403601-QC166N	7Mb / 21P	three chip enables for simple depth expansion

More results

Similar Description - AS8C403625

Manufacturer	Part #	Datasheet	Description
Alliance Semiconductor ...	AS8C163631	8Mb / 22P	power down controlled by zz input
	AS8C803600	8Mb / 18P	Power down controlled by ZZ input
	AS8C403600	2Mb / 17P	Power down controlled by ZZ input
	AS8C803625	5Mb / 22P	Power down controlled by ZZ input
TriQuint Semiconductor	TQM7M5013	241Kb / 1P	Quad-Band Input Power Controlled EDGE PAM
Qorvo, Inc	TQM7M5013	118Kb / 1P	Quad-Band Input Power Controlled EDGE PAM
Rohm	BD5242G-TR	400Kb / 16P	Delay time controlled by extemal capacitor
Rohm	BD6326NUX	1Mb / 25P	Speed controllable by PWM input signal
Linear Technology	LTC1649	224Kb / 16P	3.3V Input High Power Step-Down Switching Regulator Controller
Linear Technology	LTC1649	201Kb / 16P	3.3V Input High Power Step-Down Switching Regulator Controller

More results

AS8C403625 Datasheet(PDF) 1 Page - Alliance Semiconductor Corporation

AS8C403625 Datasheet(HTML) 1 Page - Alliance Semiconductor Corporation

Similar Part No. - AS8C403625

Similar Description - AS8C403625

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19

Datasheet Download

Link URL