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843S1066DGLFT Datasheet(PDF) 7 Page - Integrated Device Technology |
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843S1066DGLFT Datasheet(HTML) 7 Page - Integrated Device Technology |
7 / 15 page 7 ©2016 Integrated Device Technology, Inc. Revision B, November 10, 2016 843S1066D Datasheet Overdriving the XTAL Interface The XTAL_IN input can accept a single-ended LVCMOS signal through an AC coupling capacitor. A general interface diagram is shown in Figure 3A. The XTAL_OUT pin can be left floating. The maximum amplitude of the input signal should not exceed 2V and the input edge rate can be as slow as 10ns. This configuration requires that the output impedance of the driver (Ro) plus the series resistance (Rs) equals the transmission line impedance. In addition, matched termination at the crystal input will attenuate the signal in half. This can be done in one of two ways. First, R1 and R2 in parallel should equal the transmission line impedance. For most 50 applications, R1 and R2 can be 100 . This can also be accomplished by removing R1 and making R2 50 . By overdriving the crystal oscillator, the device will be functional, but note, the device performance is guaranteed by using a quartz crystal. Figure 3A. General Diagram for LVCMOS Driver to XTAL Input Interface Figure 3B. General Diagram for LVPECL Driver to XTAL Input Interface R2 100 R1 100 RS 43 Ro ~ 7 Ohm Driv er_LVCMOS Zo = 50 Ohm C1 0.1uF 3.3V 3.3V Cry stal Input Interf ace XTAL_IN XTAL_OUT Cry stal Input Interf ace XTAL_IN XTAL_OUT R3 50 C1 0.1uF R2 50 R1 50 Zo = 50 Ohm LVPECL Zo = 50 Ohm VCC=3.3V |
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