Pin Description

8

January 11, 2017

82V3155

ENHANCED T1/E1/OC3 WAN PLL WITH DUAL REFERENCE INPUTS

MON_out1

O8

Frequency Out-of-range Indicator for Fref1.

A logic high at this pin indicates that Fref1 is off the nominal frequency by more than ±12 ppm.

C155POS

C155NEG

(LVDS) O

21

22

155.52 MHz Clock Output (LVDS Level).

This pair of pins output a 155.52 MHz clock, used for OC3/STS3 and SDH/SONET applications.

C19o

(CMOS) O

43

19.44 MHz Clock Output (CMOS Level).

This output is a 19.44 MHz clock used for OC3/STS3 applications.

C32o

(CMOS) O

25

32.768 MHz Clock Output.

This output is a 32.768 MHz clock used for ST-BUS operation.

C16o

(CMOS) O

24

16.384 MHz Clock Output.

This output is a 16.384 MHz clock used for ST-BUS operation.

C8o

(CMOS) O

23

8.192 MHz Clock Output.

This output is an 8.192 MHz clock used for ST-BUS operation.

C4o

(CMOS) O

20

4.096 MHz Clock Output.

This output is a 4.096 MHz clock used for ST-BUS operation.

C2o

(CMOS) O

17

2.048 MHz Clock Output.

This output is a 2.048 MHz clock used for ST-BUS operation.

C3o

(CMOS) O

16

3.088 MHz Clock Output.

This output is a 3.088 MHz clock used for T1 applications.

C1.5o

(CMOS) O

15

1.544 MHz Clock Output.

This output is a 1.544 MHz clock used for T1 applications.

C6o

(CMOS) O

14

6.312 MHz Clock Output.

This output is a 6.312 MHz clock used for DS2 applications.

C2/C1.5

(CMOS) O

54

2.048 MHz or 1.544 MHz Clock Output.

This output is a 2.048 MHz or 1.544 MHz clock signal. If the selected reference input (Fref0 or Fref1) is 8 kHz, 2.048

MHz, or 19.44 MHz, the C2/C1.5 pin will output a 2.048 MHz clock signal. If the frequency of the selected reference

input (Fref0 or Fref1) is 1.544 MHz, the C2/C1.5 pin will output a 1.544 MHz clock signal. Refer to Table - 5 for

details.

F19o

(CMOS) O

49

8 kHz Frame Signal with 19.44 MHz Pulse Width.

This output is used for OC3/STS3 applications.

F32o

(CMOS) O

40

Frame Pulse ST-BUS 8.192 Mb/s.

This is an 8 kHz 30 ns active low framing pulse, which marks the beginning of an ST-BUS frame. This framing signal

is typically used for ST-BUS operation at 8.192 Mb/s.

F16o

(CMOS) O

39

Frame Pulse ST-BUS 8.192 Mb/s.

This is an 8 kHz 61 ns active low framing pulse, which marks the beginning of an ST-BUS frame. This framing signal

is typically used for ST-BUS operation at 8.192 Mb/s.

F8o

(CMOS) O

36

Frame Pulse.

This is an 8 kHz 122 ns active high framing pulse, which marks the beginning of a frame.

F0o

(CMOS) O

33

Frame Pulse ST-BUS 2.048 Mb/s.

This is an 8 kHz 244 ns active low framing pulse, which marks the beginning of an ST-BUS frame. This framing

signal is typically used for ST-BUS operation at 2.048 Mb/s and 4.096 Mb/s.

RSP

(CMOS) O

41

Receive Sync Pulse.

This is an 8 kHz 488 ns active high framing pulse, which marks the beginning of a ST-BUS frame. This framing

signal is typically used to connect to the Siemens MUNICH-32 device.

TSP

(CMOS) O

42

Transmit Sync Pulse.

This is an 8 kHz 488 ns active high framing pulse, which marks the beginning of an ST-BUS frame. This framing is

typically used to connect to the Siemens MUNICH-32 device.

TDO

(CMOS) O

29

Test Serial Data Out.

JTAG serial data is output on this pin on the falling edge of TCK. This pin is held in high impedance state when

JTAG scan is not enabled.

TDI

I32

Test Serial Data In.

Name

Type

Pin Number

Description