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K4S641632C Datasheet(PDF) 10 Page - Samsung semiconductor

Part # K4S641632C
Description  1M x 16Bit x 4 Banks Synchronous DRAM
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Manufacturer  SAMSUNG [Samsung semiconductor]
Direct Link  http://www.samsung.com/Products/Semiconductor
Logo SAMSUNG - Samsung semiconductor

K4S641632C Datasheet(HTML) 10 Page - Samsung semiconductor

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CMOS SDRAM
ELECTRONICS
K4S641632C
MODE REGISTER FIELD TABLE TO PROGRAM MODES
Register Programmed with MRS
Address
Function
A11 ~ A10/AP
RFU
A9
W.B.L
A8
A7
TM
A6
A5
A4
A3
A2
A1
A0
CAS Latency
BT
Burst Length
A8
A7
A6
A5
A4
A3
A2
A1
A0
BT = 0
Test Mode
Type
Mode Register Set
Reserved
Reserved
Reserved
0
0
1
1
0
1
0
1
Write Burst Length
A9
0
1
Length
Burst
Single Bit
Latency
Reserved
Reserved
2
3
Reserved
Reserved
Reserved
Reserved
CAS Latency
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
Burst Type
0
1
BT = 1
Burst Length
Type
Sequential
Interleave
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
1
2
4
8
Reserved
Reserved
Reserved
Full Page
1
2
4
8
Reserved
Reserved
Reserved
Reserved
POWER UP SEQUENCE
1. Apply power and start clock, Attempt to maintain CKE= "H", DQM= "H" and the other pins are NOP condition at the inputs.
2. Maintain stable power, stable clock and NOP input condition for a minimum of 200us.
3. Issue precharge commands for all banks of the devices.
4. Issue 2 or more auto-refresh commands.
5. Issue a mode register set command to initialize the mode register.
cf.) Sequence of 4 & 5 is regardless of the order.
The device is now ready for normal operation.
Note : 1. If A9 is high during MRS cycle, "Burst Read Single Bit Write" function will be enabled.
2. RFU (Reserved for future use) should stay "0" during MRS cycle.
Full Page Length : x4 (1024), x8 (512), x16 (256)
BA0 ~ BA1
RFU


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