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AS4C32M16MD1 Datasheet(PDF) 8 Page - Alliance Semiconductor Corporation |
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AS4C32M16MD1 Datasheet(HTML) 8 Page - Alliance Semiconductor Corporation |
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8 / 75 page  AS4C32M16MD1 Confidential 8 Rev. 2.0/February 2014 Table 2.2 Bank Select Signal BA0 BA1 Bank 0 L L Bank 1 H L Bank 2 L H Bank 3 H H Note : H = VIH , L = VIL CKE (input pin) CKE controls power-down mode, self-refresh function and deep power-down function with other command inputs. The CKE level must be kept for 2 clocks at least, that is, if CKE changes at the cross point of the CK rising edge and the CK# falling edge with proper setup time tIS, by the next CK rising edge CKE level must be kept with proper hold time tIH. DQ0 to DQ15 (input/output pins) Data are input to and output from these pins. UDQS and LDQS (input and output pin) DQS provides the read data strobes (as output) and the write data strobes (as input). Each DQS pin corresponds to eight DQ pins, respectively (See Table 2.3). UDM and LDM (input pin) DM is the reference signals of the data input mask function. DM is sampled at the cross point of DQS and VDDQ/2. When DM = high, the data input at the same timing are masked while the internal burst counter will be counting up. Each DM pin corresponds to eight DQ pins, respectively (See Table 2.3). Table 2.3 DQS and DM Correspondence Organization DQS Data mask DQs x16 bits LDQS LDM DQ0 to DQ7 UDQS UDM DQ8 to DQ15 VDD, VSS, VDDQ, VSSQ (Power supply) VDD and VSS are power supply pins for internal circuits. VDDQ and VSSQ are power supply pins for the output buffers. VDD must be equal to VDDQ. |
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