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ISL6420IRZ Datasheet(PDF) 11 Page - Intersil Corporation |
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ISL6420IRZ Datasheet(HTML) 11 Page - Intersil Corporation |
11 / 19 page 11 FN9151.4 July 18, 2005 VMSET/MODE - This pin is a dual function pin. Tie this pin to VCC5 to disable voltage margining. When not tied to VCC5, this pin serves as VMSET. Connect a resistor from this pin to ground to set the delta for voltage margining. If voltage margining and external reference tracking mode are not needed, this pin can be tied directly to ground. GPIO2 - This is general purpose IO pin for voltage margining. Refer to Table 2. TABLE 2. VOLTAGE MARGINING CONTROLLED BY GPIO1/REFIN AND GPIO2 GPIO1/REFIN GPIO2 VOUT L L No Change LH + Delta VOUT H L - Delta VOUT H H Ignored TABLE 3. VOLTAGE MARGINING/DDR OR TRACKING SUPPLY PIN CONFIGURATION FUNCTION/MODES PIN CONFIGURATIONS COMMENTS VMSET/MODE REFOUT GPIO1/REFIN GPIO2 Enable Voltage Margining Pin Connected to GND with resistor. It is used as VMSET. Connect a 1µF capacitor for bypass of external reference. Serves as a general purpose I/O. Refer to Table 2 Serves as a general purpose I/O. Refer to Table 2 REFIN or REFOUT functions will not be available in this mode. The internal 0.6V reference is used. No Voltage Margining. Normal operation using internal reference. REFOUT not used. Pin Connected to GND with resistor. It is used as VMSET Connect a 1µF capacitor for bypass of external reference. LL No Voltage Margining. Normal operation with internal reference. Buffered VREFOUT = 0.6V. H Connect a 2.2µF capacitor to GND. H (Note 2) L No Voltage Margining. External reference. Buffered VREFOUT = VREFIN H Connect a 2.2µF capacitor to GND. Connect to an external reference voltage source (0.6V to 1.25V) L NOTES: 1. The GPIO1/REFIN and GPIO2 pins cannot be left floating. 2. Ensure that GPIO1/REFIN is tied high prior to the logic change at VMSET/MODE. ISL6420 |
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