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AS4C4M16S-7TCN Datasheet(PDF) 10 Page - Alliance Semiconductor Corporation

Part # AS4C4M16S-7TCN
Description  Fully synchronous operation
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Manufacturer  ALSC [Alliance Semiconductor Corporation]
Direct Link  https://www.alliancememory.com
Logo ALSC - Alliance Semiconductor Corporation

AS4C4M16S-7TCN Datasheet(HTML) 10 Page - Alliance Semiconductor Corporation

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FEBRUARY 2011
AS4C4M16S
CLK
T0
T1
T2
T3
T4
T5
T6
T7
T8
ADDRESS
COMMAND
Bank,
Col A
READ A
NOP
NOP
NOP
Bank(s)
Precharge
tRP
NOP
NOP
Bank
Row
Activate
NOP
CAS# latency=2
tCK2, DQ
CAS# latency=3
tCK3, DQ
DOUT A0 DOUT A1
DOUT A0
DOUT A2
DOUT A1
DOUT A3
DOUT A2 DOUT A3
Don’t Care
Figure 9. Read to Precharge (CAS# Latency = 2, 3)
5 Read and AutoPrecharge command
(RAS# = "H", CAS# = "L", WE# = "H", BAs = Bank, A10 = "H", A0-A7 = Column Address)
The Read and AutoPrecharge command automatically performs the precharge operation after the
read operation. Once this command is given, any subsequent command cannot occur within a time delay of
{tRP(min.) + burst length}. At full-page burst, only the read operation is performed in this command and the
auto precharge function is ignored.
6 Write command
(RAS# = "H", CAS# = "L", WE# = "L", BAs = Bank, A10 = "L", A0-A7 = Column Address)
The Write command is used to write a burst of data on consecutive clock cycles from an active row in
an active bank. The bank must be active for at least t RCD(min.) before the Write command is issued. During
write bursts, the first valid data-in element will be registered coincident with the Write command.
Subsequent data elements will be registered on each successive positive clock edge (refer to the following
figure). The DQs remain with high-impedance at the end of the burst unless another command is initiated.
The burst length and burst sequence are determined by the mode register, which is already programmed. A
full-page burst will continue until terminated (at the end of the page it will wrap to column 0 and continue).
CLK
T0
T1
T2
T3
T4
T5
T6
T7
T8
COMMAND
NOP
WRITE A
NOP
NOP
NOP
NOP
NOP
NOP
NOP
DQ
DIN A0
DIN A1
DIN A2
DIN A3
don’t care
The first data element and the write
are registered on the same clock edge
Figure 10. Burst Write Operation (Burst Length = 4)
9
Rev2.0 May 2014


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