ICS580-01

GLITCH-FREE CLOCK MULITPLEXER

CLOCK MULTIPLEXER

IDT™ / ICS™ GLITCH-FREE CLOCK MULITPLEXER

5

ICS580-01

REV L 051310

Application Example

In the third example, the ICS580-01 is configured to automatically switch clocks when an input stops. The clock that

could stop is connected to INA while the backup clock (always running) is connected to INB. The output NO_INA is

connected to SELB. This means that when the clock on INA stops, NO_INA goes high selecting the clock on INB

which is muxed to the output after three cycles. When the clock on INA restarts, NO_INA immediately goes low,

selecting the clock on INA. The output then switches in the manner described in the first example.

The circuit diagram in Figure 3 shows a typical connection for this example. Note that CLK2 and NO_INB are

unused and are disabled by grounding OE2 and OE4. A 33

Ω series termination resistor is used on the clock output

and two decoupling capacitors of 0.01

µF are used. All other inputs are left floating and are therefore pulled high by

the on-chip pull-ups.

Output Enable

Each output has a dedicated output enable pin. If an output is unused, it should be tri-stated by tying the

appropriate output enable pin to ground.

External Components

The ICS580-01 requires two 0.01

µF decoupling capacitors, one between VDDI and GND and one between VDDC

and GND. Series termination resistors of 33

Ω can be used on CLK1 and CLK2.

NO_INA

SELB

NO_INB

DIV

GND

VDDI

OE2

INA

INB

GND

OE4

OE3

OE1

VDDC

CLK1

CLK2

VDD

0.01

µF

33

Ω

0.01

µF

Normal Clock

Backup Clock

Output Clock