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DP8473 Datasheet(PDF) 2 Page - National Semiconductor (TI) |
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DP8473 Datasheet(HTML) 2 Page - National Semiconductor (TI) |
2 / 28 page General Description (Continued) the data rate 83 ns125 ns208 ns 250 ns for data rates of 10M500k300k250 kbs respectively Specifically to support the PC-AT and PC-XT design the Floppy Disk Controller PLUS-2 includes address decode for the A0 – A2 address lines the motordrive select register data rate register for selecting 250300500 kbs Disk Changed status dual speed spindle motor control low write current and DMAinterrupt sharing logic The controller also supports direct connection to the mP bus via internal 12 mA buffers The controller also can be connected directly to the disk drive via internal open drain high drive outputs and Schmitt inputs In addition to this logic the DP8473 includes many features to ease design of higher performance drives and future con- troller upgrades These include 10 Mbs data rate extend- ed track range to 4096 Implied seeking working Scan Com- mands motor control timing both standard IBM formats as well as Sony 35 (ISO) formats and other enhancements This device is available in a 52 pin Plastic Chip Carrier and in a 48 pin Dual-In-Line package Table of Contents General Description Pin Description Functional Description Register Description Result Phase Register Description Processor Software Interface Command Description Table Command Descriptions DC and AC Characteristics Block Diagram TLF9384 – 3 Note 1 The MTR2 MTR3 DR2 and DR3 are not available on the 48 pin DIP (DP8473N J) versions Note 2 See Figure 4 for filter description Note 3 Total transistor count is 29700 (approx) FIGURE 1 DP8473 Functional Block Diagram 2 |
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