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TPS7B6701-Q1 Datasheet(PDF) 2 Page - Texas Instruments |
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TPS7B6701-Q1 Datasheet(HTML) 2 Page - Texas Instruments |
2 / 26 page TPS7B6701-Q1 TPS7B6733-Q1, TPS7B6750-Q1 SLVSCB2C – OCTOBER 2013 – REVISED DECEMBER 2014 www.ti.com Table of Contents 9.2 Functional Block Diagram ....................................... 10 1 Features .................................................................. 1 9.3 Feature Description................................................. 11 2 Applications ........................................................... 1 9.4 Device Functional Modes........................................ 13 3 Description ............................................................. 1 10 Application and Implementation........................ 14 4 Typical Application Schematic ............................. 1 10.1 Application Information.......................................... 14 5 Revision History..................................................... 2 10.2 Typical Application ................................................ 14 6 Device Comparison ............................................... 4 11 Power Supply Recommendations ..................... 16 7 Pin Configuration and Functions ......................... 4 12 Layout................................................................... 16 8 Specifications......................................................... 5 12.1 Layout Guidelines ................................................. 16 8.1 Absolute Maximum Ratings ...................................... 5 12.2 Layout Example .................................................... 17 8.2 ESD Ratings.............................................................. 5 13 Device and Documentation Support ................. 18 8.3 Recommended Operating Conditions ....................... 5 13.1 Related Links ........................................................ 18 8.4 Thermal Information .................................................. 5 13.2 Trademarks ........................................................... 18 8.5 Electrical Characteristics........................................... 6 13.3 Electrostatic Discharge Caution ............................ 18 8.6 Timing Requirements ................................................ 7 13.4 Glossary ................................................................ 18 8.7 Typical Characteristics .............................................. 7 14 Mechanical, Packaging, and Orderable 9 Detailed Description ............................................ 10 Information ........................................................... 18 9.1 Overview ................................................................. 10 5 Revision History NOTE: Page numbers for previous revisions may differ from page numbers in the current version. Changes from Revision B (March 2014) to Revision C Page • Deleted the TPS7B6750A-Q1 and TPS7B6750B-Q1 devices and DDPAK package from the data sheet............................ 1 • Changed the word terminal to pin throughout the data sheet ................................................................................................ 4 • Changed the Handling Ratings table to ESD Ratings and moved the storage temperature into the Absolute Maximum Ratings table. Added corner pin values for CDM ratings. .................................................................................... 5 Changes from Revision A (November 2013) to Revision B Page • Updated the first page by making the following additions: the Device Information table, device family name to document title, and added the navigation buttons.................................................................................................................. 1 • Changed the IQ value from < 2 to < 4 when EN = Low in the Features list .......................................................................... 1 • Added the Table of Contents and moved the Revision History to the second page ............................................................. 1 • Replaced the ORDERING INFORMATION table with the Device Comparison Table and deleted the Device and Package columns ................................................................................................................................................................... 4 • Added Moved all electrical specifications tables and the Typical Characteristics section into the Specifications section..... 5 • Changed the max value for DELAY from VI to 45 V in the Absolute Maximum Ratings table. Also added new table note for DELAY....................................................................................................................................................................... 5 • Changed the max value for ADJ, RESET from VO to 22 V in the Absolute Maximum Ratings table .................................... 5 • Changed the value of IO from 1 mA to 450 mA for the Input voltage test conditions in the Electrical Characteristics table . 6 • Added the value for VI in the test conditions of the Regulated output and the Line regulator parameters in the Electrical Characteristics table .............................................................................................................................................. 6 • Moved the timing parameters (TIMING FOR RESET) out of the Electrical Characteristics table and into the new Timing Requirements table .................................................................................................................................................... 7 • Added the Overview section title to the first paragraph of the Detailed Description section ............................................... 10 • Updated the Power-On_Reset (RESET) section by making the following changes: changed the percentage that VO exceeds for the reset output to change from 90% to 91.6% (also changed this value in the Reset Delay Timer (DELAY) section), removed The on-chip oscillator presets the delay, and changed the percentage level to assert the output from 90% to 89.6% .................................................................................................................................................... 11 • Changed the junction temperature value that disables thermal protection from 170°C to 175°C in the Thermal 2 Submit Documentation Feedback Copyright © 2013–2014, Texas Instruments Incorporated Product Folder Links: TPS7B6701-Q1 TPS7B6733-Q1 TPS7B6750-Q1 |
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