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HPA00782DRLR Datasheet(PDF) 8 Page - Texas Instruments |
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HPA00782DRLR Datasheet(HTML) 8 Page - Texas Instruments |
8 / 28 page IO3 IO4 GND IO2 IO1 V CC 8 TPD4E001 SLLS682L – JULY 2006 – REVISED MAY 2016 www.ti.com Product Folder Links: TPD4E001 Submit Documentation Feedback Copyright © 2006–2016, Texas Instruments Incorporated 7 Detailed Description 7.1 Overview The TPD4E001 is a four-channel transient voltage suppressor (TVS) based ESD protection diode array. The TPD4E001 is rated to dissipate ESD strikes at the maximum level specified in the IEC 61000-4-2 international standard (Level 4). This device has a 1.5-pF IO capacitance per channel, making it ideal for use in high-speed data IO interfaces. The ultra-low leakage current (<1 nA maximum) is suitable for precision analog measurements in applications like glucose meters and heart rate monitors. 7.2 Functional Block Diagram 7.3 Feature Description The TPD4E001 is a uni-directional ESD protection device with low capacitance. The device is constructed with a central ESD clamp that features two hiding diodes per line to reduce the capacitive loading. This central ESD clamp is also connected to VCC to provide protection for the VCC line. Each IO line is rated to dissipate ESD strikes above the maximum level specified in the IEC 61000-4-2 level 4 international standard. The TPD4E001's low loading capacitance makes it ideal for protection high-speed signal terminals. 7.4 Device Functional Modes The TPD4E001 is a passive-integrated circuit that activates whenever voltages above VBR or below the lower diodes Vforward (–0.6V) are present upon the circuit being protected. During ESD events, voltages as high as ±15 kV can be directed to ground and VCC via the internal diode network. Once the voltages on the protected lines fall below the trigger voltage of the TPD4E001 (usually within 10's of nano-seconds) the device reverts back to a high-impedance state. |
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