FEBRUARY 8, 2017

11

6-OUTPUT 3.3V PCIE ZERO-DELAY BUFFER

9DBL0641 / 9DBL0651 DATASHEET

Byte 0

Name

Control Function

Type

0

1

Default

Bit 7

DIF OE5

Output Enable

RW

Pin Control

1

Bit 6

DIF OE4

Output Enable

RW

Pin Control

1

Bit 5

0

Bit 4

DIF OE3

Output Enable

RW

Pin Control

1

Bit 3

DIF OE2

Output Enable

RW

Pin Control

1

Bit 2

DIF OE1

Output Enable

RW

Pin Control

1

Bit 1

0

Bit 0

DIF OE0

Output Enable

RW

See B11[1:0]

Pin Control

1

1. A low on these bits will overide the OE# pin and force the differential output to the state indicated by B11[1:0] (Low/Low default)

SMBus Table: PLL Operating Mode and Output Amplitude Control Register

Byte 1

Name

Control Function

Type

0

1

Default

Bit 7

PLLMODERB1

PLL Mode Readback Bit 1

R

Latch

Bit 6

PLLMODERB0

PLL Mode Readback Bit 0

R

Latch

Bit 5

PLLMODE_SWCNTRL

Enable SW control of PLL Mode RW

Values in B1[7:6]

set PLL Mode

Values in B1[4:3]

set PLL Mode

0

Bit 4

PLLMODE1

PLL Mode Control Bit 1

0

Bit 3

PLLMODE0

PLL Mode Control Bit 0

0

Bit 2

1

Bit 1

AMPLITUDE 1

RW

00 = 0.6V

01= 0.68V

1

Bit 0

AMPLITUDE 0

RW

10 = 0.75V

11 = 0.85V

0

1. B1[5] must be set to a 1 for these bits to have any effect on the part.

SMBus Table: Slew Rate Control Register

Byte 2

Name

Control Function

Type

0

1

Default

Bit 7

SLEWRATESEL DIF5

Slew rate selection

RW

Slow Setting

Fast Setting

1

Bit 6

SLEWRATESEL DIF4

Slew rate selection

RW

Slow Setting

Fast Setting

1

Bit 5

1

Bit 4

SLEWRATESEL DIF3

Slew rate selection

RW

Slow Setting

Fast Setting

1

Bit 3

SLEWRATESEL DIF2

Slew rate selection

RW

Slow Setting

Fast Setting

1

Bit 2

SLEWRATESEL DIF1

Slew rate selection

RW

Slow Setting

Fast Setting

1

Bit 1

1

Bit 0

SLEWRATESEL DIF0

Slew rate selection

RW

Slow Setting

Fast Setting

1

Note: See "Low-Power HCSL Outputs" table for slew rates.

SMBus Table: Slew Rate Control Register

Byte 3

Name

Control Function

Type

0

1

Default

Bit 7

1

Bit 6

1

Bit 5

FREQ_SEL_EN

Enable SW selection of

frequency

RW

SW frequency

change disabled

SW frequency

change enabled

0

Bit 4

FSEL1

Freq. Select Bit 1

0

Bit 3

FSEL0

Freq. Select Bit 0

0

Bit 2

1

Bit 1

1

Bit 0

SLEWRATESEL FB

Adjust Slew Rate of FB

RW

Slow Setting

Fast Setting

1

1. B3[5] must be set to a 1 for these bits to have any effect on the part.

Byte 4 is Reserved

Reserved

Reserved

00 = 100M, 10 = 125M

01 = 50M, 11= Reserved

See PLL Operating Mode Table

See PLL Operating Mode Table

Reserved

Controls Output Amplitude

Reserved

Reserved

See B11[1:0]

See B11[1:0]

Reserved

Reserved

Reserved

Reserved