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JANUARY 25, 2017

5P35023 DATASHEET

OE Pin Function Summary

PD# Priority Table

Reference Input and Selection

By programming, the 5P35023 accepts 8MHz ~40MHz crystal input, 8MHz to 125MHz differential clocks input or 1MHz

~125MHz LVCMOS (to X1) input. See below reference circuit for details.

Crystal Input (X1/X2)

The crystal oscillators should be fundamental mode quartz crystals; overtone crystals are not suitable. Crystal frequency should

be specified for parallel resonance with 40MHz maximum.

A crystal manufacturer will calibrate its crystals to the nominal frequency with a certain load capacitance value. When the

oscillator load capacitance matches the crystal load capacitance, the oscillation frequency will be accurate as 0 PPM. When the

oscillator load capacitance is lower than the crystal load capacitance, the oscillation frequency will be higher than nominal. In

order to get an accurate oscillation frequency, the matching the oscillator load capacitance with the crystal load capacitance is

required.

To set the oscillator load capacitance, 5P35023 has built-in two programmable tuning capacitors inside the chip, one at XIN and

one at XOUT. They can be adjusted independently. The value of each capacitor is composed of a fixed capacitance amount plus

a variable capacitance amount set with the XTAL[7:0] register. Adjustment of the crystal tuning capacitors allows for maximum

flexibility to accommodate crystals from various manufacturers. The range of tuning capacitor values available are in accordance

with the following table.

OE1: SE1

OE2: SE2

OE2: SE3

OE2: DIFF1/DIFF2

OE1: PD#

OE1: SE1_PPS

OE2: SE2_PPS

OE3: SE3_PPS

OE1:DFC0

OE3/DFC1

Config OE3 as SE3_PPS (Proactive Power Saving) function pin

Config OE1 as DFC0 control pin0

Config OE3 as DFC1 control pin1

OE3 only control SE3 enable/disable, other outputs are not affected by this pin status

OE2 control Differential outputs 1 and 2 only, other SE outputs are not affected by this pin status

OE1 control chip global power down (PD#) except 32.768KHz on OE1 (when 32K is enabled),

Whenthe PD# pin is active low, the chip goes to lowest power down mode and all outputs are disabled

except 32Khz output and only keep 32K/Xtal calibriation.

Config OE1 as SE1_PPS (Proactive Power Saving) funciton pin

Config OE2 as SE2_PPS (Proactive Power Saving) function pin

OE1 only control SE1 enable/disable, other outputs are not affected by this pin status

OE2 only control SE2 enable/disable, other outputs are not affected by this pin status

PD#

I2C_OE_EN_bit

SE1/2/3, DIFF1/DIFF2

SEx_PPS

output

Notes

0

x

x

stop

32KHz free run

10

x

stop

11

0

stop

1

1

1

running