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5P35021 Datasheet(PDF) 7 Page - Integrated Device Technology

Part # 5P35021
Description  Programmable Clock Generator
Download  34 Pages
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Manufacturer  IDT [Integrated Device Technology]
Direct Link  http://www.idt.com
Logo IDT - Integrated Device Technology

5P35021 Datasheet(HTML) 7 Page - Integrated Device Technology

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JANUARY 25, 2017
7
VERSACLOCK® PROGRAMMABLE CLOCK GENERATOR
5P35021 DATASHEET
Timer Function Description
1. The timer function can be used together with the DFC -Dynamic Frequency Control function or with another PLL frequency
programming.
2. The timer provides 4 different delay times as 0.5 sec - 1 sec - 2 sec - 4 sec by two bits selection.
3. The timeout flag will be set when timer times out, and the flag can be cleared by writing 0 to timer enable bit.
4. When timer times out, RESET pin (available in 5P35023) can generate a 250ms pulse signal if RESET control bit is enabled.
5. When timer times out, DFC stage will switch back to DFC00 setting if DFC function is enabled and DFC function will be
disabled after RESET.
OE Pin Function
OE pins in the 5P35021 have multiple functions. The OE pins can be configured as output enable control (OE) or chip power
down control (PD#) or Proactive Power Saving function (PPS). Furthermore, the OE pins can be configured as single or two pin
dynamic Frequency control (DFC), or the RESET out function that is associated with the Timer function.
OE Pin Function Table
Select delay time 0.5 ~ 4.0 seconds and enable Timer
Program New VCO frequency or enable DFC
System functional check
Disable Timer
Timerout Flag set and generate RESET pluse
Timer continue if system is not able to stop timer
OE1
OE2 (Not available in
5P35021)
OE3(Not available in
5P35021)
SE output enable/disable
SE1 (Default)
SE2 (Default)
SE3(Deafult)
DIFF outut enable/disable
-
DIFF1/DIFF2
-
Global Power Down (PD#)
PD#
-
-
Proactive Power Saving input
SE1_PPS
SE2_PPS
SE3_PPS
DOC control (Only PLL2)
DFC0
-
DFC1
RESET OUT
-
RESET OUT
-
Function
Pin


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