5P49V5925_17 datasheet(1/27 Pages) IDT

Part #	5P49V5925

Description	Programmable Clock Generator

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Manufacturer	IDT [Integrated Device Technology]

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DATASHEET

5P49V5925 MARCH 3, 2017

1

Programmable Clock Generator

5P49V5925

Description

The 5P49V5925 is a programmable clock generator intended

for high performance consumer, networking, industrial,

computing, and data-communications applications.

Configurations may be stored in on-chip One-Time

Programmable (OTP) memory or changed using I2C

interface. This is IDT’s fifth generation of programmable clock

technology (VersaClock® 5).

The frequencies are generated from a single reference clock.

The reference clock can come from one of the two redundant

clock inputs. A glitchless manual switchover function allows

one of the redundant clocks to be selected during normal

operation.

Two select pins allow up to 4 different configurations to be

programmed and accessible using processor GPIOs or

bootstrapping. The different selections may be used for

different operating modes (full function, partial function, partial

power-down), regional standards (US, Japan, Europe) or

system production margin testing.

The device may be configured to use one of two I2C

addresses to allow multiple devices to be used in a system.

Pin Assignment

Features

• Generates up to four independent output frequencies

• High performance, low phase noise PLL, <0.7 ps RMS

typical phase jitter on outputs

• Four fractional output dividers (FODs)

• Independent Spread Spectrum capability on each output

• Four banks of internal non-volatile in-system

programmable or factory programmable OTP memory

• I2C serial programming interface

• Five LVCMOS outputs, including one reference output

• I/O Standards:

– Single-ended I/Os: 1.8V to 3.3V LVCMOS

• Input frequency ranges:

– LVCMOS Reference Clock Input (XIN/REF) – 1MHz to

200MHz

– LVDS, LVPECL, HCSL Differential Clock Input (CLKIN,

CLKINB) – 1MHz to 200MHz

– Crystal frequency range: 8MHz to 40MHz

• Output frequency ranges:

– LVCMOS Clock Outputs – 1MHz to 200MHz

• Individually selectable output voltage (1.8V, 2.5V, 3.3V) for

each output

• Redundant clock inputs with manual switchover

• Programmable loop bandwidth

• Programmable slew rate control

• Programmable crystal load capacitance

• Individual output enable/disable

• Power-down mode

• 1.8V, 2.5V or 3.3V core VDDD, VDDA

• Available in 24-pin VFQFPN 4mm x 4mm package

• -40° to +85°C industrial temperature operation

1

7

24-pin VFQFPN

19

13

XOUT

XIN/REF

VDDO3

CLKIN

NC

OUT2

CLKINB

CLKSEL

OUT3

NC

VDDO2

VDDA

EPAD

GND

2

3

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