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APL3227E Datasheet(PDF) 10 Page - Anpec Electronics Coropration |
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APL3227E Datasheet(HTML) 10 Page - Anpec Electronics Coropration |
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10 / 16 page  Copyright © ANPEC Electronics Corp. Rev. A.1 - Mar., 2017 www.anpec.com.tw 10 APL3227E ACOK Output An open-drain ACOK output gives the APL3227E the abil- ity to communicate a stable power source to the host system. ACOK is driven low after input voltage is stable between minimum VIN and VOVLO after debounce. Con- nect a pullup resistor from ACOK to the logic I/O voltage of the host system. ACOK is high impedance after ther- mal shutdown. Function Description Detailed Description The APL3227E overvoltage protection devices feature a low on-resistance (RON) internal FET and protect low- voltage systems against voltage faults up to +28VDC. An internal clamp also protects the devices from surges up to +120V. If the input voltage exceeds the overvoltage threshold, the internal FET is turned off to prevent dam- age to the protected components. The 8ms debounce time built into the device prevents false turn on of the internal FET during startup. Device Operation The devices contain timing logic that controls the turn-on of the internal FET. The internal charge pump is enabled when V IN < VIN_OVLO if internal trip thresholds are used and when V OVLO < VOVLO_TH if external trip thresholds are used. The charge-pump startup, which occurs after a 8ms debounce delay, turns the internal FET on. Overvoltage Lockout (OVLO) When the V IN voltage rises above VOVLO, the internal FET switch is turned OFF. When the VIN voltage returns be- low V OVLO, the FET switch is turned on again after the internal delay of. This delay time ensures that the VIN supply has stabilized before turning the switch back on. When the OVP condition is cleared and the FET is com- pletely turned ON. The APL3227E incorporate an internal FET with a 30m Ω (typ) R ON. The FET is internally driven by a charge pump that generates a necessary gate voltage above IN. Internal Switch Thermal-Shutdown Protection The APL3227E feature thermal shutdown circuitry. The internal FET turns off when the junction temperature ex- ceeds +130oC (typ). The device exits thermal shutdown after the junction temperature cools by 30oC (typ). OCP The output current is monitored by the internal OCP circuit. When the output current reaches the OCP threshold, the device limits the output current at OCP threshold level. If the OCP condition continues for a debounce time, the internal power FET is turned off. After the recovery time, the FET will be turned on again and the output current is monitored again. Under normal application, when the current reach the current limit level with debounce time 80us, the internal switch turn off. The release condition is after 40ms & T J< 90oC. |
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