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ST10F296TR Datasheet(PDF) 9 Page - STMicroelectronics

Part # ST10F296TR
Description  High performance 16-bit CPU with DSP functions
Download  346 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

ST10F296TR Datasheet(HTML) 9 Page - STMicroelectronics

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ST10F296E
Contents
9/346
24.6
Flash characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 300
24.7
ADC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 302
24.7.1
Conversion timing control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 303
24.7.2
ADC conversion accuracy . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 304
24.7.3
Analog reference pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 306
24.7.4
Analog input pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 306
24.7.5
Example of external network sizing . . . . . . . . . . . . . . . . . . . . . . . . . . . 310
24.8
AC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 311
24.8.1
Test waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 311
24.8.2
Definition of internal timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 312
24.8.3
Clock generation modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 313
24.8.4
Prescaler operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 314
24.8.5
Direct drive . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 314
24.8.6
Oscillator watchdog (OWD) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 315
24.8.7
Phase-locked loop (PLL) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 315
24.8.8
Voltage controlled oscillator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 316
24.8.9
PLL jitter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 317
24.8.10
Jitter in the input clock . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 317
24.8.11
Noise in the PLL loop . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 317
24.8.12
PLL lock/unlock . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 319
24.8.13
Main oscillator specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 319
24.8.14
External clock drive XTAL1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 320
24.8.15
Memory cycle variables . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 321
24.8.16
External memory bus timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 322
24.8.17
READY and CLKOUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 334
24.8.18
External bus arbitration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 336
24.8.19
High-speed synchronous serial interface (SSC) timing modes . . . . . . 338
25
Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 342
26
Ordering information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 344
27
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 345
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