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TMS427409A Datasheet(PDF) 11 Page - National Semiconductor (TI) |
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TMS427409A Datasheet(HTML) 11 Page - National Semiconductor (TI) |
11 / 37 page TMS416409A, TMS417409A, TMS426409A, TMS427409A 4194304 BY 4-BIT EXTENDED DATA OUT DYNAMIC RANDOM-ACCESS MEMORIES SMKS893B – AUGUST 1996 – REVISED APRIL 1997 11 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251–1443 electrical characteristics over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (continued) TMS426409A PARAMETER TEST CONDITIONS† ’426409A - 50 ’426409A -60 ’426409A - 70 UNIT PARAMETER TEST CONDITIONS† MIN MAX MIN MAX MIN MAX UNIT VOH High-level output IOH = – 2 mA LVTTL 2.4 2.4 2.4 V VOH output voltage IOH = – 100 µA LVCMOS VCC – 0.2 VCC – 0.2 VCC – 0.2 V VOL Low-level output IOL = 2 mA LVTTL 0.4 0.4 0.4 V VOL output voltage IOL = 100 µA LVCMOS 0.2 0.2 0.2 V II Input current (leakage) VCC = 3.6 V, VI = 0 V to 3.9 V, All others = 0 V to VCC ± 10 ± 10 ± 10 µA IO Output current (leakage) VCC = 3.6 V, VO = 0 V to VCC, CAS high ± 10 ± 10 ± 10 µA ICC1‡§ Average read- or write- cycle current VCC = 3.6 V, Minimum cycle 90 70 60 mA ICC2 Average standby VIH = 2 V (LVTTL) After one memory cycle, RAS and CAS high 2 2 2 mA ICC2 standby current VIH = VCC – 0.2 V (LVCMOS), After one memory cycle, RAS and CAS high 1 1 1 mA ICC3‡§ Average refresh current (RAS-only refresh or CBR) VCC = 3.6 V, Minimum cycle, RAS cycling, CAS high (RAS-only refresh), RAS low after CAS low (CBR) 90 70 60 mA ICC4‡¶ Average EDO current VCC = 3.6 V, tHPC = MIN, RAS low, CAS cycling 100 90 80 mA † For conditions shown as MIN / MAX, use the appropriate value specified in the timing requirements. ‡ Measured with outputs open § Measured with a maximum of one address change while RAS = VIL ¶ Measured with a maximum of one address change during each EDO cycle, tHPC |
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