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LNBH30QTR Datasheet(PDF) 7 Page - STMicroelectronics |
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LNBH30QTR Datasheet(HTML) 7 Page - STMicroelectronics |
7 / 27 page LNBH30 Application information DocID023739 Rev 2 7/27 voltage power not good function (PNG). Once the OLF (or OTF or PNG) bit is active (set to “1”), it is latched to “1” until the relevant cause is removed and a new register reading operation is performed. 2.5 VMON: output voltage diagnostic When the device output voltage is active (VOUT pin), its value is internally monitored and, as long as the output voltage level is below the guaranteed limits, the relevant VMON I²C bit is set to “1” (see Table 12: "Output voltage diagnostic (VMON bit, status register) characteristics" for more details). 2.6 PDO: overcurrent detection on output pull-down stage When an overcurrent occurs on the pull-down output stage due to an external voltage source greater than the LNBH30 nominal VOUT, and for a time longer than ISINK_TIME_OUT (10 ms typ.), the corresponding PDO I²C bit is set to “1”. This may happen due to an external voltage source presence on the LNB output (VOUT pin). For current threshold and deglitch time details, see Table 9: "Electrical characteristics". 2.7 Power-on I²C interface reset and undervoltage lockout The I²C interface built into the LNBH30 is automatically reset at power-on. As long as the VCC stays below the undervoltage lockout (UVLO) threshold (4.7 V typ.), the interface does not respond to any I²C command and all DATA register bits are initialized to zeroes, therefore keeping the power blocks disabled. Once the VCC rises above 4.8 V typ., the I²C interface becomes operative and the DATA registers can be configured by the main microprocessor. 2.8 PNG: input voltage minimum detection When input voltage (VCC pin) is lower than LPD (low power diagnostic) minimum thresholds, the PNG I²C bit is set to “1”. Refer to Table 9: "Electrical characteristics" for threshold details. 2.9 OLF: overcurrent and short-circuit protection and diagnostic In order to reduce the total power dissipation during an overload or a short-circuit condition, the device is provided with a dynamic short-circuit protection. The overcurrent protection circuit works dynamically: as soon as an overload is detected, the output current is provided for TON time (90 ms) and after that, the output is set in shutdown for a TOFF time of typically 900 ms. Simultaneously, the corresponding diagnostic OLF I²C bit of the status register is set to “1”. After this time has elapsed, the involved output is resumed for a time TON. At the end of TON, if the overload is still detected, the protection circuit cycles again through TOFF and TON. At the end of a full TON in which no overload is detected, normal operation is resumed and the OLF diagnostic bit is reset to LOW after register reading is performed. Typical TON +TOFF time is 990 ms and is determined by an internal timer. This dynamic operation can greatly reduce the power dissipation in short-circuit condition, still ensuring excellent power-on startup in most conditions. |
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