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LNBH26L Datasheet(PDF) 6 Page - STMicroelectronics |
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LNBH26L Datasheet(HTML) 6 Page - STMicroelectronics |
6 / 28 page Application information (valid for each section A/B) LNBH26L 6/28 Doc ID 022876 Rev 1 2.3 Data encoding by external DiSEqC envelope control through the DSQIN pin If an external DiSEqC envelope source is available, it is possible to use the internal 22 kHz generator activated during the tone transmission by connecting the DiSEqC envelope source to the DSQIN pin. In this case the I²C tone control bits must be set: EXTM=0 and TEN=1. In this way, the internal 22 kHz signal is superimposed to the VOUT DC voltage to generate the LNB output 22 kHz tone. During the period in which the DSQIN is kept high the internal control circuit activates the 22 kHz tone output. The 22 kHz tone on the VOUT pin is activated with about 6 µs delay from the DSQIN TTL signal rising edge, and it stops with a delay time in the range from 15 µs to 60 µs after the 22 kHz TTL signal on DSQIN has expired (refer to Figure 3). Figure 3. Tone enable and disable timing (using envelope signal) 2.4 Output current limit selection The linear regulator current limit threshold can be set by an external resistor connected to the ISEL pin. The resistor value defines the output current limit by the equation: Equation 1 with ISET=0, where RSEL is the resistor connected between ISEL and GND expressed in k Ω and IMAX (typ.) is the typical current limit threshold expressed in mA. IMAX can be set up to 750 mA for each channel. However, it is recommended to not exceed for a long period a total amount of current of 1 A from both sections (IOUT_A + IOUT_B < 1 A) in order to avoid the overtemperature protection from triggering and to thoroughly validate the PCB layout thermal management in real application environment conditions. 2.5 Output voltage selection Each linear regulator channel output voltage level can be easily programmed in order to accomplish application specific requirements, using 4 + 4 bits of an internal DATA1 register (see Section 7.3: Data registers and Table 13: Output voltage selection table (Data1 register, write mode) for exact programmable values). Register writing is accessible via the I²C bus. AM10427v1 ~ 6 µs 15 µs ~ 60 µs DSQIN Tone Output 206 . 1 MAX RSEL 16578 .) typ ( I = |
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