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BQ24192IRGER Datasheet(PDF) 4 Page - Texas Instruments |
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BQ24192IRGER Datasheet(HTML) 4 Page - Texas Instruments |
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4 / 52 page  STAT SCL SDA PGND PGND SYS SYS 4 5 6 7 8 9 15 16 17 18 22 23 24 1 2 3 BAT BAT 13 14 19 20 21 10 11 12 VBUS D+ D – bq24190 STAT SCL SDA PGND PGND SYS SYS 4 5 6 7 8 9 15 16 17 18 22 23 24 1 2 3 BAT BAT 13 14 19 20 21 10 11 12 VBUS PSEL PG bq24192 bq24192I bq24190, bq24192, bq24192I SLUSAW5B – JANUARY 2012 – REVISED DECEMBER 2014 www.ti.com 7 Pin Configuration and Functions RGE Package 24-Pin VQFN With Exposed Thermal Pad (Top View) Blue pins indicate difference in pin names/functionality between devices. Pin Functions PIN NUMBER TYPE DESCRIPTION bq24192 bq24190 bq24192I Charger Input Voltage. The internal n-channel reverse block MOSFET (RBFET) is connected between VBUS VBUS VBUS 1,24 P and PMID with VBUS on source. Place a 1-µF ceramic capacitor from VBUS to PGND and place it as close as possible to IC. (Refer to Application Information Section for details) I Positive line of the USB data line pair. D+/D– based USB host/charging port detection. The detection includes D+ – 2 data contact detection (DCD) and primary detection in bc1.2. Analog I – PSEL 2 Power source selection input. High indicates a USB host source and Low indicates an adapter source. Digital I Negative line of the USB data line pair. D+/D– based USB host/charging port detection. The detection includes D– – 3 data contact detection (DCD) and primary detection in bc1.2. Analog Open drain active low power good indicator. Connect to the pull up rail via 10-k Ω resistor. LOW indicates a O – PG 3 good input source if the input voltage is between UVLO and ACOV, above SLEEP mode threshold, and current Digital limit is above 30 mA. Open drain charge status output to indicate various charger operation. Connect to the pull up rail via 10-k Ω. O LOW indicates charge in progress. HIGH indicates charge complete or charge disabled. When any fault STAT STAT 4 condition occurs, STAT pin in bq24190, bq24192 blinks at 1 Hz, and STAT pin in bq24192I has a 10-k Ω Digital resistor to ground. I SCL SCL 5 I2C Interface clock. Connect SCL to the logic rail through a 10-k Ω resistor. Digital I/O SDA SDA 6 I2C Interface data. Connect SDA to the logic rail through a 10-k Ω resistor. Digital O Open-drain Interrupt Output. Connect the INT to a logic rail via 10-k Ω resistor. The INT pin sends active low, INT INT 7 256-us pulse to host to report charger device status and fault. Digital USB current limit selection pin during buck mode, and active high enable pin during boost mode. I In buck mode with USB host (PSEL=High), when OTG = High, IIN limit = 500 mA and when OTG = Low, IIN OTG OTG 8 limit = 100 mA. Digital The boost mode is activated when the REG01[5:4] = 10 and OTG pin is High. I Active low Charge Enable pin. Battery charging is enabled when REG01[5:4] = 01 and CE pin = Low. CE pin CE CE 9 must be pulled high or low. Digital 4 Submit Documentation Feedback Copyright © 2012–2014, Texas Instruments Incorporated Product Folder Links: bq24190 bq24192 bq24192I |
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