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TLV171 Datasheet(PDF) 9 Page - Texas Instruments |
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TLV171 Datasheet(HTML) 9 Page - Texas Instruments |
9 / 40 page 9 TLV171, TLV2171, TLV4171 www.ti.com SBOS783 – SEPTEMBER 2016 Product Folder Links: TLV171 TLV2171 TLV4171 Submit Documentation Feedback Copyright © 2016, Texas Instruments Incorporated 6.8 Typical Characteristics at VS = ±18 V, VCM = VS / 2, RLOAD = 10 kΩ connected to VS / 2, and CL = 100 pF (unless otherwise noted) Table 1. Characteristic Performance Measurements DESCRIPTION FIGURE Offset Voltage Production Distribution Figure 1 Offset Voltage vs Common-Mode Voltage Figure 2 Offset Voltage vs Common-Mode Voltage (Upper Stage) Figure 3 Input Bias Current and Input Offset Current vs Temperature Figure 4 Output Voltage Swing vs Output Current (Maximum Supply) Figure 5 CMRR and PSRR vs Frequency (Referred-to-Input) Figure 6 0.1-Hz to 10-Hz Noise Figure 7 Input Voltage Noise Spectral Density vs Frequency Figure 8 Quiescent Current vs Supply Voltage Figure 9 Open-Loop Gain and Phase vs Frequency Figure 10 Closed-Loop Gain vs Frequency Figure 11 Open-Loop Gain vs Temperature Figure 12 Open-Loop Output Impedance vs Frequency Figure 13 Small-Signal Overshoot vs Capacitive Load Figure 14, Figure 15 No Phase Reversal Figure 16 Small-Signal Step Response (100 mV) Figure 17, Figure 18 Large-Signal Step Response Figure 19, Figure 20 Large-Signal Settling Time (10-V Positive Step) Figure 21 Large-Signal Settling Time (10-V Negative Step) Figure 22 Short-Circuit Current vs Temperature Figure 23 Maximum Output Voltage vs Frequency Figure 24 EMIRR IN+ vs Frequency Figure 25 |
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