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EFR32BG12P332F1024GL125-B Datasheet(PDF) 6 Page - Silicon Laboratories |
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EFR32BG12P332F1024GL125-B Datasheet(HTML) 6 Page - Silicon Laboratories |
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6 / 181 page  1. Feature List The EFR32BG12 highlighted features are listed below. • Low Power Wireless System-on-Chip. • High Performance 32-bit 40 MHz ARM Cortex®-M4 with DSP instruction and floating-point unit for efficient signal processing • Embedded Trace Macrocell (ETM) for advanced debugging • Up to 1024 kB flash program memory • Up to 256 kB RAM data memory • 2.4 GHz and Sub-GHz radio operation • TX power up to 19 dBm • Low Energy Consumption • 10.0 mA RX current at 2.4 GHz (1 Mbps GFSK) • 10.8 mA RX current at 2.4 GHz (250 kbps O-QPSK DSSS) • 8.5 mA TX current @ 0 dBm output power at 2.4 GHz • 70 μA/MHz in Active Mode (EM0) • 1.5 μA EM2 DeepSleep current (16 kB RAM retention and RTCC running from LFRCO) • Wake on Radio with signal strength detection, preamble pattern detection, frame detection and timeout • High Receiver Performance • -95.2 dBm sensitivity @ 1 Mbit/s GFSK • -91.3 dBm sensitivity @ 2 Mbit/s GFSK • -120.6 dBm sensitivity at 2.4 kbps GFSK (868 MHz) • Supported Modulation Formats • GFSK • 2-FSK / 4-FSK with fully configurable shaping • Shaped OQPSK / (G)MSK • Configurable DSSS and FEC • BPSK / DBPSK TX (OPNs supporting Sub-GHz) • OOK / ASK (OPNs supporting Sub-GHz) • Supported Protocols: • Bluetooth® Low Energy (Bluetooth 5) • Proprietary Protocols • Wireless M-Bus (OPNs supporting Sub-GHz) • Low Power Wide Area Networks (OPNs supporting Sub- GHz) • Support for Internet Security • General Purpose CRC • True Random Number Generator • Hardware Cryptographic Acceleration for AES 128/256, SHA-1, SHA-2 (SHA-224 and SHA-256) and ECC • Wide selection of MCU peripherals • 12-bit 1 Msps SAR Analog to Digital Converter (ADC) • 2×Analog Comparator (ACMP) • 2×Digital to Analog Converter (VDAC) • 3×Operational Amplifier (Opamp) • Digital to Analog Current Converter (IDAC) • Low-Energy Sensor Interface (LESENSE) • Multi-channel Capacitive Sense Interface (CSEN) • Up to 54 pins connected to analog channels (APORT) shared between analog peripherals • Up to 65 General Purpose I/O pins with output state reten- tion and asynchronous interrupts • 8 Channel DMA Controller • 12 Channel Peripheral Reflex System (PRS) • 2×16-bit Timer/Counter • 3 + 4 Compare/Capture/PWM channels • 2×32-bit Timer/Counter • 3 + 4 Compare/Capture/PWM channels • 32-bit Real Time Counter and Calendar • 16-bit Low Energy Timer for waveform generation • 32-bit Ultra Low Energy Timer/Counter for periodic wake-up from any Energy Mode • 3×16-bit Pulse Counter with asynchronous operation • 2×Watchdog Timer with dedicated RC oscillator • 4×Universal Synchronous/Asynchronous Receiver/Trans- mitter (UART/SPI/SmartCard (ISO 7816)/IrDA/I2S) • Low Energy UART (LEUART™) • 2×I2C interface with SMBus support and address recogni- tion in EM3 Stop • Wide Operating Range • 1.8 V to 3.8 V single power supply • Integrated DC-DC, down to 1.8 V output with up to 200 mA load current for system • -40 °C to 85 °C • QFN48 7x7 mm Package • BGA125 7x7 mm Package EFR32BG12 Blue Gecko Bluetooth ®Low Energy SoC Family Data Sheet Feature List silabs.com | Building a more connected world. Rev. 1.0 | 1 |
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Similar Description - EFR32BG12P332F1024GL125-B |
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