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DLP3000FQB Datasheet(PDF) 8 Page - Texas Instruments |
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DLP3000FQB Datasheet(HTML) 8 Page - Texas Instruments |
8 / 37 page DLP3000 DLPS022B – JANUARY 2012 – REVISED MARCH 2015 www.ti.com 6.4 Recommended Operating Conditions over operating free-air temperature range (unless otherwise noted). MIN NOM MAX UNIT ELECTRICAL VREF LVCMOS interface supply voltage(1) 1.65 1.8 1.95 V VCC LVCMOS logic supply voltage(1) 2.375 2.5 2.625 V VOFFSET Mirror electrode and HVCMOS supply voltage (1)(2) 8.25 8.5 8.75 V VBIAS Mirror electrode voltage(1)(2) 15.5 16 16.5 V VRESET Mirror electrode voltage(1) –9.5 –10 –10.5 V |VBIAS – VOFFSET| Supply voltage delta (absolute value)(2) 8.75 V VT+ Positive-going threshold voltage 0.4 × VREF 0.7 × VREF V VT– Negative-going threshold voltage 0.3 × VREF 0.6 × VREF V VHYS Hysteresis voltage (VT+ – VT–) 0.1 × VREF 0.4 × VREF V ƒDCLK DCLK clock frequency 60 80 MHz ENVIRONMENTAL (3) Array Temperature – operational, long-term (4) (5) (6) 0 40 to 70(5) °C TARRAY Array Temperature – operational, short-term(4)(7) –20 75 °C Absolute temperature delta between any point on the | TDELTA | 10 °C window, ceramic, or array - operational(8) (9) ILLUV Illumination, wavelength < 420 nm 0.68 mW/cm2 Thermally ILLVIS Illumination, wavelengths between 420 and 700 nm mW/cm2 Limited(10) ILLIR Illumination, wavelength > 700 nm 10 mW/cm2 (1) All voltage values are with respect to the ground terminals VSS (ground). The following power supplies are all required to operate the DMD: Voltages VSS, VCC, VREF, VOFFSET, VBIAS, and VRESET. (2) To prevent excess current, the supply voltage delta |VBIAS - VOFFSET| must be less than specified limit. See the Absolute Maximum Ratings for further details. (3) Optimal, long-term performance and optical efficiency of the Digital Micromirror Device (DMD) can be affected by various application parameters, including illumination spectrum, illumination power density, micromirror landed duty-cycle, ambient temperature (storage and operating), DMD temperature, ambient humidity (storage and operating), and power on or off duty cycle. TI recommends that application-specific effects be considered as early as possible in the design cycle. (4) Array Temperature is the worst-case of any test point shown in Figure 11, or the active array as calculated by the Micromirror Array Temperature Calculation. (5) Per Figure 1, the maximum operational array temperature should be derated based on the micromirror landed duty cycle that the DMD experiences in the end application. Refer to Micromirror Landed-On/Landed-Off Duty Cycle for a definition of micromirror landed duty cycle. (6) Long-term is defined as the usable life of the device. (7) Short-term is defined as less than 500 hours over the usable life of the device. (8) Ceramic package temperature as measured at test point 3 (TP 3) in Figure 11. (9) As measured between any two points on the exterior of the package, or as predicted between any two points inside the micromirror array cavity. Refer to the Micromirror Array Temperature Calculation for information related to calculating the micromirror array temperature. (10) Refer to Thermal Information and Micromirror Array Temperature Calculation. 8 Submit Documentation Feedback Copyright © 2012–2015, Texas Instruments Incorporated Product Folder Links: DLP3000 |
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