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PI6C2502A Datasheet(PDF) 1 Page - Pericom Semiconductor Corporation

Part # PI6C2502A
Description  Phase-Locked Loop Clock Driver
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Manufacturer  PERICOM [Pericom Semiconductor Corporation]
Direct Link  http://www.pericom.com
Logo PERICOM - Pericom Semiconductor Corporation

PI6C2502A Datasheet(HTML) 1 Page - Pericom Semiconductor Corporation

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PS8500
10/02/00
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PI6C2502A
ProductDescription
The PI6C2502A features a low-skew, low-jitter, phase-locked loop
(PLL) clock driver. By connecting the feedback FB_OUT output
to the feedback FB_IN input, the propagation delay from the
CLK_IN input to any clock output will be nearly zero.
ProductFeatures
• High-PerformancePhase-Locked-LoopClockDistribution
for Networking,
• Synchronous DRAM modules for server/workstation/
PC applications
• Allows Clock Input to have Spread Spectrum
modulation for EMI reduction
• Zero Input-to-Output delay
• Lowjitter:Cycle-to-Cyclejitter±75psmax.
• On-chip series damping resistor at clock output drivers
for low noise and EMI reduction
• Operatesat3.3VVCC
• Wide range of Clock Frequencies 80 to 134 MHz
• Package: Plastic 8-pin SOIC Package (W)
8-Pin
W
Phase-Locked Loop Clock Driver
Application
If a system designer needs more than 16 outputs with the features
just described, using two or more zero-delay buffers such as
PI6C2509Q, and PI6C2510Q, is likely to be impractical. The
device-to-device skew introduced can significantly reduce the
performance. Pericom recommends the use of a zero-delay buffer
and an eighteen output non-zero-delay buffer. As shown in Figure
1, this combination produces a zero-delay buffer with all the signal
characteristics of the original zero-delay buffer, but with as many
outputs as the non-zero-delay buffer part. For example, when
combined with an eighteen output non-zero delay buffer, a system
designer can create a seventeen-output zero-delay buffer.
Figure1.ThisCombinationProvidesZero-DelayBetweenthe
Reference Clocks Signal and 17 Outputs.
CLK_IN
FB_IN
PLL
AVCC
FB_OUT
CLK_OUT
1
2
3
VCC
4
CLK_OUT
CLK_IN
GND
FB_IN
8
7
6
5
AGND
FB_OUT
AVCC
17
Zero Delay
Buffer
PI6C2502
Reference
Clock
Signal
CLK_OUT
Feedback
18 Output
Non-Zero
Delay
Buffer


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