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PCF8598C-2P Datasheet(PDF) 10 Page - NXP Semiconductors |
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PCF8598C-2P Datasheet(HTML) 10 Page - NXP Semiconductors |
10 / 24 page 1997 Feb 13 10 Philips Semiconductors Product specification 256 to 1024 × 8-bit CMOS EEPROMs with I2C-bus interface PCF85xxC-2 family 8.5 Read operations Read operations are initiated in the same manner as write operations with the exception that the LSB of the slave address is set to logic 1. There are three basic read operations; current address read, random read and sequential read sequential read. 8.5.1 REMARK The lower 8 bits of the word address are incremented after each transmission of a data byte (read or write). The MSB of the word address, which is defined in the slave address, is not changed when the word address count overflows. Thus, the word address overflows from 255 to 0 and from 511 to 256. Fig.8 Master reads PCF85xxC-2 slave after setting word address (write word address; read data). handbook, full pagewidth S0 A SLAVE ADDRESS WORD ADDRESS A A SLAVE ADDRESS acknowledge from slave acknowledge from slave acknowledge from slave R/W acknowledge from master A DATA auto increment word address MBA703 - 1 P no acknowledge from master 1 DATA auto increment word address last byte R/W S1 n bytes at this moment master transmitter becomes master receiver and EEPROM slave receiver becomes slave transmitter Fig.9 Master reads PCF85xxC-2 immediately after first byte (read mode). handbook, full pagewidth S 1A SLAVE ADDRESS DATA A1 DATA acknowledge from slave acknowledge from master no acknowledge from master R/W auto increment word address MBA704 - 1 auto increment word address n bytes last bytes P |
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