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SiC533DB Datasheet(PDF) 2 Page - Vishay Siliconix |
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SiC533DB Datasheet(HTML) 2 Page - Vishay Siliconix |
2 / 17 page SiC533 www.vishay.com Vishay Siliconix S16-2309-Rev. A, 14-Nov-16 2 Document Number: 75010 For technical questions, contact: powerictechsupport@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 PINOUT CONFIGURATION Fig. 2 - SiC533 Pin Configuration PIN DESCRIPTION PIN NUMBER NAME FUNCTION 1 ZCD_EN# The ZCD_EN# pin enables or disables Diode Emulation. When ZCD_EN# is LOW, diode emulation is allowed. When ZCD_EN# is HIGH, continuous conduction mode is forced. ZCD_EN# can also be put in a high impedance mode by floating the pin. If both ZCD_EN# and PWM are floating, the device shuts down and consumes typically 3 μA (9 μA max.) current. 2VCIN Supply voltage for internal logic circuitry 23 CGND Analog ground for the driver IC 3 N.C. No connection 4 BOOT High-side driver bootstrap voltage 5 PHASE Return path of high-side gate driver 6 to 8, 25 VIN Power stage input voltage. Drain of high-side MOSFET 9 to 11, 17, 18, 20, 26 PGND Power ground 12 to 16 VSWH Switch node of the power stage 19, 24 GL Low-side gate signal 21 VDRV Supply voltage for internal gate driver 22 PWM PWM control input ORDERING INFORMATION PART NUMBER PACKAGE MARKING CODE SiC533CD-T1-GE3 PowerPAK® MLP4535-22L SiC533 5 V PWM optimized SiC533DB Reference board 1 2 3 4 5 ZCD_EN# V CIN N.C. BOOT PHASE 16 15 14 13 12 V SWH V SWH V SWH V SWH V SWH 11 10 9 8 7 6 17 18 19 20 21 22 P GND 26 V IN 25 C GND 23 GL 24 |
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