down mode the POWER DOWN input should go to a logical

mode it is necessary to insure that all other inputs are at

valid levels before switching the POWER DOWN input back

to a logical one These precautions are necessary to insure

that no data is lost or altered when changing to or from the

power down mode

Counter and RAM Resets GO Command

The counters and RAM can be reset by writing all 1’s (FF) at

hundredths tenths units and tens of seconds counters

This GO command is used for precise starting of the clock

The data on the data bus is ignored during the write If the

seconds counter is at a value greater than 39 when the GO

is issued the minute counter will increment otherwise the

minute counter is unaffected This command is not neces-

sary to start the clock but merely a convenient way to start

precisely at a given minute

Status Bit

The status bit is provided to inform the user that the clock is

in the process of rolling over when a counter is read The

status bit is set if this 1 kHz clock occurs during or after any

counter read This tells the user that the clock is rippling

through the real time counter Because the clock is rippling

invalid data may be read from the counter If the status bit is

set following a counter read the counter should be reread

the other data lines will zero The bit is set when a logical

one appears This bit should be read every time a counter

read or after a series of counter reads are done The trailing

Using the Rollover Status Bit

If a single read of any clock counter is made it should be

followed by reading the rollover status bit

Example Read months then read rollover status

If a sequential read of the clock counters is made then the

rollover status bit should be read after the last counter is

read

Example Read hours minutes seconds then read the roll-

over status

Oscillator

The oscillator used is the standard Pierce parallel resonant

oscillator Externally 2 capacitors a 20 MX resistor and the

crystal are required The 20 MX resistor is connected be-

tween OSC IN and OSC OUT to bias the internal inverter in

the linear region For micropower crystals a resistor in series

with the oscillator output may be necessary to insure the

crystal is not overdriven This resistor should be approxi-

mately 200 kX The capacitor values should be typically

20 pF – 25 pF The crystal frequency is 32768 Hz

The oscillator input can be externally driven if desired In

this case the oscillator output should be left floating and the

oscillator input levels should be within 03V of the supplies

A ground line or ground plane between pins 9 and 10 may

be necessary to reduce interference of the oscillator by the

A4 address

Control Lines

The READ WRITE AND CHIP SELECT signals are active

low inputs The READY signal is an open drain output At

the start of each read or write cycle the READY line (open

drain) will pull low and will remain low until valid data from a

chip read appears on the bus or data on the bus is latched

in during a write READ and WRITE must be accompanied

by a CHIP SELECT (see

Figures 3 and 4 for read and write

cycle timing)

During a read or write address bits must not change while

chip select and control strobes are low

Test Mode

The test mode is for production testing It allows the coun-

ters to count at a higher than normal rate In this mode the

32768 kHz oscillator input is connected directly to the ten

thousandths of seconds counter The chip select and write

TLF11070 – 3

FIGURE 1 Interrupt Register Format

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