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AS6C8016-55ZIN Datasheet(PDF) 3 Page - Alliance Semiconductor Corporation |
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AS6C8016-55ZIN Datasheet(HTML) 3 Page - Alliance Semiconductor Corporation |
3 / 12 page TRUTH TABLE I/O OPERATION MODE CE# OE# WE# LB# UB# DQ0-DQ7 DQ8-DQ15 SU P PLY CURRENT Standby H X X X X X X H X H High – Z High – Z High – Z High – Z ISB1 Output Disable L L H H H H L X X L High – Z High – Z High – Z High – Z ICC,ICC1 Read L L L L L L H H H L H L H L L DOUT High – Z DOUT High – Z DOUT DOUT ICC,ICC1 Write L L L X X X L L L L H L H L L DIN High – Z DIN High – Z DIN DIN ICC,ICC1 Note: H = VIH, L = VIL, X = Don't care. DC ELECTRICAL CHARACTERISTICS PARAMETER SYMBOL TEST CONDITION MIN. TYP.*4 MAX. UNIT Supply Voltage VCC 2.7 3.0 5.5 V Input High Voltage VIH*1 2.4 - VCC+0.3 V Input Low Voltage VIL*2 - 0.2 - 0.6 V Input Leakage Current ILI VCC VIN VSS - 1 - 1 µA Output Leakage Current ILO VCC VOUT VSS Output Disabled - 1 - 1 µA Output High Voltage VOH IOH = -1mA 2.4 2.7 - V Output Low Voltage VOL IOL = 2mA - - 0.4 V - 55 - 30 60 mA ICC Cycle time = Min. CE# = VIL, II/O = 0mA Other pins at VIL or VIH Average Operating Power supply Current ICC1 Cycle time = 1µs CE#≦ ≦ ≦ ≦ ≦ ≦ 0.2V, II/O = 0mA Other pins at 0.2V or VCC-0.2V - 4 12 mA Standby Power Supply Current ISB1 CE# VCC-0.2V Other pins at 0.2V or VCC-0.2V - 6 50 µA Notes: 1. VIH(max) = VCC + 3.0V for pulse width less than 10ns. 2. VIL(min) = VSS - 3.0V for pulse width less than 10ns. 3. Over/Undershoot specifications are characterized, not 100% tested. 4. Typical values are included for reference only and are not guaranteed or tested. Typical valued are measured at VCC = VCC(TYP.) and TA = 25℃ ℃ CAPACITANCE (T A = 25 , f = 1.0MHz) PARAMETER SYMBOL MIN. MAX UNIT Input Capacitance CIN - 6 pF Input/Output Capacitance CI/O - 8 pF Note : These parameters are guaranteed by device characterization, but not production tested. 512KX 8 BIT LOW POWER CMOS SRAM January 2007 NOVEMBER 2007 NOVEMBER/2007, V 1.0 Alliance Memory Inc. Page 3 of 12 AS6C8016 512K X 16 BIT SUPER LOW POWER CMOS SRAM |
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