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Vishay Siliconix

Revision: 27-Apr-15

1

Document Number: 69378

THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT

(1.6 mm x 1.6 mm, 0.8 mm Pitch, 0.290 mm Bump Height)

Notes

1. Bumps are 95.5/3.8/0.7 Sn/Ag/Cu.

2. Backside surface is coated with a Ti/Ni/Ag layer.

3. Non-solder mask defined copper landing pad.

4. Laser marks on the silicon die back.

5. “b1” is the diameter of the solderable substrate surface, defined by an opening in the solder resist layer solder mask defined.

6. • is the location of pin 1

Note

• Use millimeters as the primary measurement.

DIM.

MILLIMETERS

INCHES

MIN.

NOM.

MAX.

MIN.

NOM.

MAX.

A

0.550

0.575

0.600

0.0217

0.0226

0.0236

A1

0.260

0.275

0.290

0.0102

0.0108

0.0114

A2

0.290

0.300

0.310

0.0114

0.0118

0.0122

b

0.370

0.390

0.410

0.0146

0.0153

0.0161

b1

0.300

0.0118

e

0.800

0.0314

s

0.360

0.380

0.400

0.0141

0.0150

0.0157

D

1.520

1.560

1.600

0.0598

0.0614

0.0630

E

1.520

1.560

1.600

0.0598

0.0614

0.0630

K

0.155

0.185

0.215

0.0061

0.0073

0.0085

ECN: T15-0175-Rev. A, 27-Apr-15

DWG: 6038

4x Ø b1

D

S

e

S

Mark on backside of die

XXXX

G

S

D

D

XXX

Note 5

Recommended land pattern

e

4x 0.30 to .31

(Note 3)

Solder mask-0.4

b

K

b1