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LP3964EMP-ADJ Datasheet(PDF) 11 Page - National Semiconductor (TI) |
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LP3964EMP-ADJ Datasheet(HTML) 11 Page - National Semiconductor (TI) |
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11 / 20 page  Applications Information Input Capacitor Selection The LP3961 and LP3964 require a minimum input capaci- tance of 10µF between the input and ground pins to prevent any impedance interactions with the supply. This capacitor should be located very close to the V IN pin. This capacitor can be of any type such as ceramic, tantalum, or aluminium. Any good quality capacitor which has good tolerance over temperature and frequency is recommended. Output Capacitor Selection The LP3961 and LP3964 require a minimum of 10µF capaci- tance between the output and ground pins for proper opera- tion. LP3961 and LP3964 work best with Tantalum or Elec- trolytic capacitor. The output capacitor should have a good tolerance over temperature, voltage, and frequency. Larger capacitance provides better improved load dynamics and noise performance. The output capacitor should be con- nected very close to the Vout pin. Output Adjustment An adjustable output device has output voltage range of 1.215V to 5.1V. To obtain a desired output voltage, the fol- lowing equation can be used with R1 always a 10k Ω resistor. For output stability, C F must be between 68pF and 100pF. Output Noise Noise is specified in two ways- Spot Noise or Output noise density is the RMS sum of all noise sources, measured at the regulator output, at a spe- cific frequency (measured with a 1Hz bandwidth). This type of noise is usually plotted on a curve as a function of fre- quency. Total output Noise or Broad-band noise is the RMS sum of spot noise over a specified bandwidth, usually several de- cades of frequencies. Attention should be paid to the units of measurement. Spot noise is measured in units µV/ √Hz or nV/√Hz and total output noise is measured in µV(rms). The primary source of noise in low-dropout regulators is the internal reference. In CMOS regulators, noise has a low fre- quency component and a high frequency component, which depend strongly on the silicon area and quiescent current. Noise can be reduced in two ways: by increasing the transis- tor area or by increasing the current drawn by the internal reference. Increasing the area will decrease the chance of fitting the die into a smaller package. Increasing the current drawn by the internal reference increases the total supply current (ground pin current). Using an optimized trade-off of ground pin current and die size, LP3961/LP3964 achieves low noise performance and low quiescent current operation. The total output noise specification for LP3961/LP3964 is presented in the Electrical Characteristics table. The Output noise density at different frequencies is represented by a curve under typical performance characteristics. Short-Circuit Protection The LP3961and LP3964 is short circuit protected and in the event of a peak over-current condition, the short-circuit con- trol loop will rapidly drive the output PMOS pass element off. Once the power pass element shuts down, the control loop will rapidly cycle the output on and off until the average power dissipation causes the thermal shutdown circuit to re- spond to servo the on/off cycling to a lower frequency. Please refer to the section on thermal information for power dissipation calculations. Error Flag Operation The LP3961/LP3964 produces a logic low signal at the Error Flag pin when the output drops out of regulation due to low input voltage, current limiting, or thermal limiting. This flag has a built in hysteresis. The timing diagram in Figure 1 shows the relationship between the ERROR and the output voltage. In this example, the input voltage is changed to demonstrate the functionality of the Error Flag. The internal Error flag comparator has an open drain output stage. Hence, the ERROR pin should be pulled high through a pull up resistor. Although the ERROR pin can sink current of 1mA, this current is energy drain from the input supply. Hence, the value of the pull up resistor should be in the range of 100k Ω to 1MΩ. The ERROR pin must be con- nected to ground if this function is not used. It should also be noted that when the shutdown pin is pulled low, the ERROR pin is forced to be invalid for reasons of saving power in shutdown mode. www.national.com 11 |
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