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LDC2112 Datasheet(PDF) 11 Page - Texas Instruments |
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LDC2112 Datasheet(HTML) 11 Page - Texas Instruments |
11 / 52 page Inductive Sensing Core IN0 Logic GND SCL SDA I 2C LPWRB IN3 COM LDC2114 Digital Algorithm INTB VDD Resonant Circuit Driver OUT0 IN1 IN2 OUT1 OUT2 OUT3 Copyright © 2016, Texas Instruments Incorporated 11 LDC2112, LDC2114 www.ti.com SNOSD15B – DECEMBER 2016 – REVISED APRIL 2017 Product Folder Links: LDC2112 LDC2114 Submit Documentation Feedback Copyright © 2016–2017, Texas Instruments Incorporated Functional Block Diagram (continued) Figure 11. Block Diagram of LDC2114 7.3 Feature Description 7.3.1 Multi-Channel and Single-Channel Operation The LDC2112 provides two independent sensing channels; the LDC2114 provides four independent sensing channels. In the following sections, some parameters, such as DATAn and SENSORn_CONFIG, contain a channel index n. In those instances, n = 0 or 1 for LDC2112, and n = 0, 1, 2, or 3 for LDC2114. The LDC2112's two available channels are always enabled in Normal Power Mode. The LDC2112 sequentially samples both channels at the configured scan rate. Either channel can be independently enabled in Low Power Mode by setting the LPENn (n = 0 or 1) bit fields in Register EN (Address 0x0C). Any of the LDC2114’s four available channels can be independently enabled by setting the ENn and LPENn (n = 0, 1, 2, or 3) bit fields in Register EN (Address 0x0C). The low-power-enable bit LPENn only takes effect if the corresponding ENn bit is also set. If only one channel is set active, the LDC2114 periodically samples the single active channel at the configured scan rate. When several channels are set active, the LDC2114 operates in multi-channel mode, and it sequentially samples the active channels at the configured scan rate. Each channel of the LDC2114 can be independently enabled in Low Power Mode and Normal Power Mode. 7.3.2 Button Output Interfaces Button events may be reported by using two methods. The first method is to monitor the OUTn pins (n = 0, 1, 2, or 3), which are push-pull outputs and can be used as interrupts to a micro-controller. The polarities of these pins are programmable through Register OPOL_DPOL (Address 0x1C). Any button press or error condition is also reported by the push-pull interrupt pin, INTB. Its polarity is configurable through Register INTPOL (Address 0x11). Any assertion of INTB is cleared upon reading Register STATUS (Address 0x00). Each push-pull output must be assigned to a dedicated general-purpose input pin on the micro-controller to avoid potential current fights. The second method is by use of the LDC2112/LDC2114’s I2C interface. The Register OUT (Address 0x01) contains the fields OUT0, OUT1, OUT2, and OUT3, which indicate when a button press has been detected. For more advanced button press measurements, the output DATAn registers (n = 0, 1, 2, or 3, Addresses 0x02 through 0x09), which are 12-bit two’s complements, can be retrieved for all active buttons, and processed on a micro-controller. A valid button push is represented by a positive value. The polarity is configurable in Register OPOL_DPOL (Address 0x1C). The DATAn values can be used to implement multi-level buttons, where the data value is correlated to the amount of force applied to the button. |
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