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IS31AP2121-LQLS1 Datasheet(PDF) 10 Page - Integrated Silicon Solution, Inc |
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IS31AP2121-LQLS1 Datasheet(HTML) 10 Page - Integrated Silicon Solution, Inc |
10 / 41 page IS31AP2121 Integrated Silicon Solution, Inc. – www.issi.com 10 Rev. C, 10/20/2015 I2C DIGITAL INPUT SWITCHING CHARACTERISTICS (Note 4) Symbol Parameter Standard Mode Fast Mode Unit Min. Max. Min. Max. fSCL Serial-Clock frequency 0 100 0 400 kHz tBUF Bus free time between a STOP and a START condition 4.7 1.3 μs tHD, STA Hold time (repeated) START condition 4.0 0.6 μs tSU, STA Repeated START condition setup time 4.7 0.6 μs tSU, STO STOP condition setup time 4.0 0.6 μs tHD, DAT Data hold time 0 3.45 0 0.9 μs tSU, DAT Data setup time 250 100 ns tLOW SCL clock low period 4.7 1.3 μs tHIGH SCL clock high period 4.0 0.6 μs tR Rise time of both SDA and SCL signals, receiving 1000 20+0.1Cb 300 ns tF Fall time of both SDA and SCL signals, receiving 300 20+0.1Cb 300 ns Cb Capacitive load for each bus line 400 400 pF VNL Noise margin at the low level for each connected device (including hysteresis) 0.1VDD 0.1VDD V VNH Noise margin at the high level for each connected device (including hysteresis) 0.2VDD 0.2VDD V I2S DIGITAL INPUT SWITCHING CHARACTERISTICS (Note 4) Symbol Parameter Condition Min. Typ. Max. Unit tLR LRCIN period (1/FS) 10.41 31.25 μs tBL BCLK rising edge to LRCIN edge 50 ns tLB LRCIN edge to BCLK rising edge 50 ns tBCC BCLK period (1/64FS) 162.76 488.3 ns tBCH BCLK pulse width high 81.38 244 ns tBCL CBLK pulse width low 81.38 244 ns tDS SDATA set up time 50 ns tDH SDATA hold time 50 ns Note 2: Thermal dissipation is limited by package type and PCB design. The external heat-sink or system cooling method should be adopted for maximum power output. Note 3: Measured with A-weighting filter. Note 4: Guaranteed by design. |
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