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SN65LBC182PE4 Datasheet(PDF) 5 Page - Texas Instruments |
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SN65LBC182PE4 Datasheet(HTML) 5 Page - Texas Instruments |
5 / 15 page SN65LBC182 SN75LBC182 SLLS500A − MAY 2001 − REVISED MARCH 2005 5 www.ti.com receiver electrical characteristics over recommended operating conditions (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP† MAX UNIT VIT+ Positive-going input threshold voltage 0.2 V VIT− Negative-going input threshold voltage −0.2 V Vhys Hysteresis voltage (VIT+ − VIT-) 70 mV VIK Enable-input clamp voltage II = −18 mA −1.5 V VOH High-level output voltage VID = 200 mV, IO = −8 mA, See Figure 7 2.8 V VOL Low-level output voltage VID = 200 mV, IO = 4 mA, See Figure 7 0.4 V IOZ High-impedance-state output current VO = 0.4 to 2.4 V ±1 µA VIH = 12 V, VCC = 5 V 250 II Bus input current VIH = 12 V, VCC = 0 V Other input at 0 V 250 A II Bus input current VIH = −7 V, VCC = 5 V Other input at 0 V −200 µA VIH = −7 V, VCC = 0 V −200 IIH High-level input current (RE) VIH = 2 V 50 µA IIL Low-level input current (RE) VIL = 0.8 V −50 µA ICC Supply current No load DE at 0 V, RE at 0 V 3.5 mA ICC Supply current No load DE at 0 V, RE at VCC 175 250 µA † All typical values are at VCC = 5 V and TA = 25°C. receiver switching characteristics over recommended operating conditions (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT tr Differential output signal rise time 20 tf Differential output signal fall time CL = 50 pF, See Figure 7 20 ns tPLH Propagation delay time, low-to-high-level output CL = 50 pF, See Figure 7 150 ns tPHL Propagation delay time, high-to-low-level output 150 tPZH Output enable time to high level 100 ns tPZL Output enable time to low level See Figure 8 100 ns tPHZ Output disable time from high level See Figure 8 100 ns tPLZ Output disable time from low level 100 ns tsk(p) Pulse skew tPHL − tPLH 50 ns |
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